参数资料
型号: M29DW640D70N1
厂商: 意法半导体
英文描述: 64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory
中文描述: 64兆位(8兆x8或4Mb的x16插槽,多行,页,引导块)3V电源快闪记忆体
文件页数: 14/56页
文件大小: 942K
代理商: M29DW640D70N1
M29DW640D
14/56
Table 3. Bus Operations, BYTE = V
IL
Note: X = V
IL
or V
IH
.
Table 4. Bus Operations, BYTE = V
IH
Note: X = V
IL
or V
IH
.
Operation
E
G
W
Address Inputs
Data Inputs/Outputs
A21-
A12
A3
A2
A1
A0
others,
DQ15A-1
DQ14
-DQ8
DQ7-DQ0
Bus Read
V
IL
V
IL
V
IH
Cell Address
Hi-Z
Data Output
Bus Write
V
IL
V
IH
V
IL
Command Address
Hi-Z
Data Input
Output Disable
X
V
IH
V
IH
X
Hi-Z
Hi-Z
Standby
V
IH
X
X
X
Hi-Z
Hi-Z
Read Manufacturer
Code
V
IL
V
IL
V
IH
Bank
Addrs
V
IL
V
IL
V
IL
V
IL
A6 = V
IL
A9 = V
ID
,
others =X
Hi-Z
20h
Read Device Code
(Cycle 1)
V
IL
V
IL
V
IH
V
IL
V
IL
V
IL
V
IH
Hi-Z
7Eh
Read Device Code
(Cycle 2)
V
IL
V
IL
V
IH
V
IH
V
IH
V
IH
V
IL
Hi-Z
02h
Read Device Code
(Cycle 3)
V
IL
V
IL
V
IH
V
IH
V
IH
V
IH
V
IH
Hi-Z
01h
Extended Block
Indicator Bit
(DQ7)
V
IL
V
IL
V
IH
Bank
A
V
IL
V
IL
V
IH
V
IH
Hi-Z
80h (factory locked)
00h (not locked)
Block Protection
Verification
V
IL
V
IL
V
IH
Block
Addrs
V
IL
V
IL
V
IH
V
IL
Hi-Z
01h (protected)
00h (unprotected)
Operation
E
G
W
Address Inputs
Data Inputs/Outputs
A21-
A12
A3
A2
A1
A0
others
DQ15A-1, DQ14-DQ0
Bus Read
V
IL
V
IL
V
IH
Cell Address
Data Output
Bus Write
V
IL
V
IH
V
IL
Command Address
Data Input
Output Disable
X
V
IH
V
IH
X
Hi-Z
Standby
V
IH
X
X
X
Hi-Z
Read Manufacturer
Code
V
IL
V
IL
V
IH
Bank
Addrs
V
IL
V
IL
V
IL
V
IL
A6 = V
IL
A9 = V
ID
,
others =X
0020h
Read Device Code
(Cycle 1)
V
IL
V
IL
V
IH
V
IL
V
IL
V
IL
V
IH
227Eh
Read Device Code
(Cycle 2)
V
IL
V
IL
V
IH
V
IH
V
IH
V
IH
V
IL
2202h
Read Device Code
(Cycle 3)
V
IL
V
IL
V
IH
V
IH
V
IH
V
IH
V
IH
2201h
Extended Block
Indicator Bit
(DQ7)
V
IL
V
IL
V
IH
Bank
A
V
IL
V
IL
V
IH
V
IH
0080h (factory locked)
0000h (not locked)
Block Protection
Verification
V
IL
V
IL
V
IH
Block
Addrs
V
IL
V
IL
V
IH
V
IL
0001h (protected)
0000h (unprotected)
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