参数资料
型号: M30101F3FP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PDSO42
封装: PLASTIC, SSOP-42
文件页数: 10/125页
文件大小: 1608K
代理商: M30101F3FP
entative Specifications REV.C1
pecifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30101/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Usage precaution
107
Precautionary Notes in Using the Device
Serial I/O
(1) When reading data from the UARTi receive buffer in the clock asynchronous serial I/O mode, data should be
read high-byte first then low-byte using a byte-size instruction. If data is read as low-byte then high-byte or
with a word-size instruction, the framing error and parity error flags are cleared.
A code example is shown below.
MOV.B
00A3H. R0H;
Read the high-byte of UART0 receive buffer register
MOV.B
00A2H. R0L;
Read the low-byte of UART0 receive buffer register
A-D Converter
(1) Only write to each bit (except bit 6) of the AD Control Register 0, or each bit of the AD Control Register 1, or
bit 0 of the AD Control Register 2 when AD conversion is stopped (before a trigger occurs).
(2) When the Vref Connection Bit is changed from “0” to “1”, wait 1
s or longer before starting AD conversion.
(3) When changing AD operation mode, select an analog pin again.
(4) One Shot Mode
Read the AD register only after confirming AD conversion is completed, which can be determined by using
the AD conversion interrupt.
(5) Repeat Mode
Use the undivided main clock as the internal CPU clock when using this mode. The main clock can be
divided by an internal divider circuit but make sure that you use main clock when using this mode.
Stop and Wait Mode
(1) You must put at least four NOPs after a stop (All-Clock Stop Bit to "1") or a wait instruction. When switching
to a stop or wait mode, 4 instructions are prefetched after the stop or wait instruction. And so, ensure that at
least four NOPs follow the stop or wait instruction.
Interrupts
(1) Reading Address 0 by Firmware
Please do not read address 0 by firmware. In the CPU's interrupt processing sequence, when a
maskable interrupt occurs, the interrupt information (interrupt no. and interrupt request level) are read
from address 0. This read in turn, clears the interrupt request bit to "0" even pending with higher request
level. Reading address 0 by firmware may cause interrupt cancellation or unexpected interrupts so
please do not read address 0 by firmware.
(2) Stack Pointer
Set the value of the stack pointer before accepting interrupts. Immediately after a reset, the value of the
stack pointer is 000016. Accepting an interrupt before setting a value of the stack pointer may produce
unpredictable results (runaway program, etc.) Make sure that you set the value of the stack pointer
before accepting interrupts.
(3) External interrupts
Clear the interrupt request bit to "0" when the INT0 - INT3 polarity is changed. The reason being is that
an interrupt request may be generated when the polarity is changed.
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