参数资料
型号: M30101M3-XXXFP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PDSO42
封装: PLASTIC, SSOP-42
文件页数: 13/125页
文件大小: 1608K
代理商: M30101M3-XXXFP
Under
development
Tentative Specifications REV.C1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30101/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Memory
11
Operation of Functional Blocks
The M30100/M30101/M30102 contain the following devices on a single chip: ROM and RAM, which func-
tion as memory for storing instructions and data; a central processing unit (CPU) that executes operations;
and peripheral devices, such as timers, serial I/O, an A-D converter, an D-A converter, and I/O ports.
The individual devices are described below.
Memory
Figure 1.3.1 is a memory map. The address space extends the 1M bytes from address 0000016 to
FFFFF16. From FFFFF16 down is ROM. For example, in the M30100M2-XXXFP, there is 16K bytes of
internal ROM from FC00016 to FFFFF16. The vector table for fixed interrupts such as the reset are mapped
to FFFDC16 to FFFFF16. The starting address of the interrupt routine is stored here. The address of the
vector table for timer interrupts, etc., can be set as desired using the internal register (INTB). See the
section on interrupts for details.
From 0040016 up is RAM. For example, in the M30101M2-XXXFP, there is 1K byte of internal RAM from
0040016 to 007FF16. In addition to storing data, the RAM also stores the stack used when calling subrou-
tines and when interrupts are generated.
The SFR area is mapped to 0000016 to 000FF16. This area accommodates the control registers for periph-
eral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Any part of the SFR area that is not
occupied is reserved and cannot be used for other purposes.
The special page vector table is mapped to FFE0016 to FFFDB16. If the starting addresses of subroutines
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
Figure 1.3.1. Memory map
0000016
YYYYY16
FFFFF16
0040016
XXXXX16
Internal ROM area
SFR area
(For details, see
Figures 1.6.1 and
1.6.2)
Internal RAM area
FFE0016
FFFDC16
FFFFF16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
Reset
Special page
vector table
DBC
Address
XXXXX16
007FF16
FC00016
M30100M2
Type No.
Address
YYYYY16
007FF16
FA00016
M30101F3
007FF16
FA00016
M30100M3
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