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参数资料
| 型号： | M30291MCV-XXXHP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64 |
| 文件页数： | 5/32页 |
| 文件大小： | 218K |
| 代理商： | M30291MCV-XXXHP |
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M16C/29 Group
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
2. Central Processing Unit(CPU)
Rev.0.30 2004.06.15
page 13 of 30
REJ03B0072-0030Z
2. Central Processing Unit (CPU)
Figure 2.1 shows the CPU registers. The CPU has 13 registers. Of these, R0, R1, R2, R3, A0, A1 and FB
comprise a register bank. There are two register banks.
Figure 2.1. Central Processing Unit Register
2.1 Data Registers (R0, R1, R2 and R3)
The R0 register consists of 16 bits, and is used mainly for transfers and arithmetic/logic operations. R1 to
R3 are the same as R0.
The R0 register can be separated between high (R0H) and low (R0L) for use as two 8-bit data registers.
R1H and R1L are the same as R0H and R0L. Conversely, R2 and R0 can be combined for use as a 32-
bit data register (R2R0). R3R1 is the same as R2R0.
2.2 Address Registers (A0 and A1)
The register A0 consists of 16 bits, and is used for address register indirect addressing and address
register relative addressing. They also are used for transfers and arithmetic/logic operations. A1 is the
same as A0.
In some instructions, registers A1 and A0 can be combined for use as a 32-bit address register (A1A0).
Data registers (Note)
Address registers (Note)
Frame base registers (Note)
Program counter
Interrupt table register
User stack pointer
Interrupt stack pointer
Static base register
Flag register
Note: These registers comprise a register bank. There are two register banks.
R0H(R0's high bits)
b15
b8 b7
b0
R3
INTBH
USP
ISP
SB
C
D
Z
S
B
O
I
U
IPL
R0L(R0's low bits)
R1H(R1's high bits)R1L(R1's low bits)
R2
b31
R3
R2
A1
A0
FB
b19
INTBL
b15
b0
PC
b19
b0
b15
b0
FLG
b15
b0
b15
b0
b7
b8
Reserved area
Carry flag
Debug flag
Zero flag
Sign flag
Register bank select flag
Overflow flag
Interrupt enable flag
Stack pointer select flag
Reserved area
Processor interrupt priority level
The upper 4 bits of INTB are INTBH and
the lower 16 bits of INTB are INTBL.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M30291MC-XXXHP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:RENESAS MCU M16C FAMILY / M16C/Tiny SERIES |
| M30291T2-CPE-HP | 制造商:Renesas Electronics Corporation 功能描述:DEV COMPACT EMULATOR M16C/28/29 - Bulk |
| M30291T-64FPD | 制造商:Renesas Electronics Corporation 功能描述:Converter Board For 64-Pin 0.5mm-Pitch LQFP 制造商:Renesas Electronics Corporation 功能描述:M16C2X PITCH CONVERTER, 64-PIN - Bulk |
| M30291T-EPB | 制造商:Renesas Electronics Corporation 功能描述:DEV EMULATOR ACCESSORY - Bulk |
| M30291T-EPB-HP | 功能描述:EMULATOR PERSONALITY KIT M16C/28 RoHS:否 类别:编程器，开发系统 >> 配件 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF) |
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