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参数资料
| 型号： | M30620MCM-XXXGP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | PLASTIC, QFP-100 |
| 文件页数： | 9/30页 |
| 文件大小： | 379K |
| 代理商： | M30620MCM-XXXGP |
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Timing
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
17
Switching characteristics (referenced to VCC = 3V, VSS = 0V at Topr = – 20oC to 85oC / – 40oC to
85oC (Note 2), CM15 = “1” unless otherwise specified)
Table 1.26.23. Memory expansion and microprocessor modes
(when accessing external memory area with wait, and select multiplexed bus)
Note 2: Specify a product of –40°C to 85°C to use it.
Symbol
Standard
Measuring condition
Max.
Min.
Parameter
Unit
td(BCLK-AD)
Address output delay time
60
ns
th(BCLK-AD)
Address output hold time (BCLK standard)
4ns
td(BCLK-CS)
Chip select output delay time
60
ns
th(BCLK-CS)
Chip select output hold time (BCLK standard)
4ns
ns
th(RD-AD)
Address output hold time (RD standard)
(Note 1)
td(BCLK-RD)
RD signal output delay time
60
ns
th(BCLK-RD)
RD signal output hold time
0
ns
th(WR-AD)
Address output hold time (WR standard)
(Note 1)
td(BCLK-WR)
WR signal output delay time
60
ns
td(BCLK-DB)
Data output delay time (BCLK standard)
80
ns
th(BCLK-DB)
Data output hold time (BCLK standard)
4
ns
td(DB-WR)
Data output delay time (WR standard)
(Note 1)
ns
th(BCLK-ALE)
ALE signal output hold time (BCLK standard)
– 4
ns
td(AD-ALE)
ALE signal output delay time (Address standard)
(Note 1)
ns
th(ALE-AD)
ALE signal output hold time(Address standard)
40
ns
th(BCLK-WR)
WR signal output hold time
0ns
ns
th(RD-CS)
Chip select output hold time (RD standard)
(Note 1)
th(WR-CS)
Chip select output hold time (WR standard)
(Note 1)
ns
td(AD-RD)
Post-address RD signal output delay time
ns
0
td(AD-WR)
Post-address WR signal output delay time
ns
0
tdZ(RD-AD)
Address output floating start time
ns
8
td(BCLK-ALE)
ALE signal output delay time (BCLK standard)
ns
60
Note 1: Calculated according to the BCLK frequency as follows:
th(RD – AD) =
f(BCLK) X 2
10
9
[ns]
th(WR – AD) =
f(BCLK) X 2
10
9
[ns]
th(RD – CS) =
f(BCLK) X 2
10
9
[ns]
th(WR – CS) =
f(BCLK) X 2
10
9
[ns]
td(DB – WR) =
f(BCLK) X 2
10
9
– 80
[ns]
X 3
td(AD – ALE) =
f(BCLK) X 2
10
9
– 45
[ns]
th(WR – DB) =
f(BCLK) X 2
10
9
[ns]
th(WR-DB)
Data output hold time (WR standard)
ns
(Note 1)
Figure 1.26.1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M30620MCN | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30620MCN-XXXFP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30620MCN-XXXGP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30620MCP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30620MCP-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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