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参数资料
| 型号： | M30624FGPFP-U5 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 20 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, QFP-100 |
| 文件页数： | 27/87页 |
| 文件大小： | 919K |
| 代理商： | M30624FGPFP-U5 |
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M16C/62P Group (M16C/62P, M16C/62PT)
5. Electrical Characteristics (M16C/62P)
4
8
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4
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S
0
3
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2
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page 33
Table 5.3 A/D Conversion Characteristics (1)
Standard
Min.
Typ.Max.
–
INL
Resolution
Integral
Non-Linearity
Error
Bits
VREF =VCC1
10
SymbolParameter
Measuring Condition
Unit
AN0 to AN7 input
AN0_0 to AN0_7 input
AN2_0 to AN2_7 input
ANEX0, ANEX1 input
VREF=
VCC1=
5V
LSB
±3
LSB
±7
LSB
VREF =VCC1=3.3V
8 bits
±2
RLADDER
tCONV
Ladder Resistance
10-bit Conversion Time, Sample & Hold
Function Available
Reference Voltage
Analog Input Voltage
k
s
V
VIA
VREF
V
0
2.0
10
VCC1
VREF
40
2.75
8-bit Conversion Time, Sample & Hold
Function Available
s
2.33
tCONV
tSAMP
Sampling Time0.25
s
VREF =VCC1
VREF =VCC1=5V, AD=12MHz
VREF =VCC1=5V, AD=12MHz
DNL
Differential Non-Linearity Error
Offset Error
Gain Error
–
LSB
±1
±3
NOTES:
1. Referenced to VCC1=AVCC=VREF=3.3 to 5.5V, VSS=AVSS=0V at Topr = -20 to 85
°C / -40 to 85 °C unless otherwise
specified.
2. If VCC1 > VCC2, do not use AN0_0 to AN0_7 and AN2_0 to AN2_7 as analog input pins.
3. AD frequency must be 12 MHz or less. And divide the fAD if VCC1 is less than 4.0V, and AD frequency into 10 MHz
or less.
4. When sample & hold function is disabled, AD frequency must be 250 kHz or more, in addition to the limitation in Note 3.
When sample & hold function is enabled, AD frequency must be 1MHz or more, in addition to the limitation in Note 3.
10 bits
VREF=
VCC1=
3.3V
LSB
±5
LSB
±7
VREF=
VCC1=
5V
LSB
±3
LSB
±7
LSB
VREF =VCC1=3.3V
8 bits
±2
10 bits
VREF=
VCC1=
3.3V
LSB
±5
LSB
±7
–
Absolute
Accuracy
External operation amp
connection mode
AN0 to AN7 input
AN0_0 to AN0_7 input
AN2_0 to AN2_7 input
ANEX0, ANEX1 input
External operation amp
connection mode
AN0 to AN7 input
AN0_0 to AN0_7 input
AN2_0 to AN2_7 input
ANEX0, ANEX1 input
External operation amp
connection mode
AN0 to AN7 input
AN0_0 to AN0_7 input
AN2_0 to AN2_7 input
ANEX0, ANEX1 input
External operation amp
connection mode
Tolerance Level Impedance
–
3k
Table 5.4 D/A Conversion Characteristics (1)
Min.
Typ.Max.
–
tsu
RO
Resolution
Absolute Accuracy
Setup Time
Output Resistance
Reference Power Supply Input Current
Bits
%
k
mA
IVREF
1.0
1.5
8
3
Symbol
Parameter
Measuring Condition
Unit
20
10
4
s
(NOTE 2)
Standard
NOTES:
1. Referenced to VCC1=VREF=3.3 to 5.5V, VSS=AVSS=0V at Topr = -20 to 85
°C / -40 to 85 °C unless otherwise specified.
2. This applies when using one D/A converter, with the D/A register for the unused D/A converter set to “00h”. The
resistor ladder of the A/D converter is not included. Also, when D/A register contents are not “00h,” the IVREF will
flow even if Vref is disconnected by the A/D control register.
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相关代理商/技术参数 |
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|---|---|
| M30624FGPFPU5C | 制造商:Renesas Electronics Corporation 功能描述:MCU,M16C/62P Group (M16C/62P, M16C/62PT) |
| M30624FGPGP | 制造商:Renesas Electronics Corporation 功能描述:Micro,M16C/62P,ROM 256k+4k FL, |
| M30624FGPGP D5 | 制造商:Renesas Electronics Corporation 功能描述: |
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