参数资料
型号: M306H2MC-XXXFP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP116
封装: 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件页数: 21/32页
文件大小: 2643K
代理商: M306H2MC-XXXFP
28
Rev. 1.0
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA ACQUISITION CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306H2MC-XXXFP
Table 2.4.7 Microcomputer status in hold state
Item
Status
Oscillation
ON
___
_____
_______
R/W signal, address bus, data bus, CS, BHE
Floating
Programmable I/O ports
P0, P1, P2, P3, P4, P5
Floating
P6, P7, P8, P9, P10
Maintains status when hold signal is received
__________
HLDA
Output “L”
Internal peripheral circuits
ON (but watchdog timer stops)
ALE signal
Undefined
__________
HOLD > DMAC > CPU
(6) Hold signal
The hold signal is used to transfer the bus privileges from the CPU to the external circuits. Inputting “L”
__________
to the HOLD pin places the microcomputer in the hold state at the end of the current bus access. This
__________
status is maintained and “L” is output from the HLDA pin as long as “L” is input to the HOLD pin. Table
2.4.7 shows the microcomputer status in the hold state.
__________
Bus-using priorities are given to HOLD, DMAC, and CPU in order of decreasing precedence.
Figure 2.4.6 Bus-using priorities
(7) External bus status when the internal area is accessed
Table 2.4.8 shows the external bus status when the internal area is accessed.
Table 2.4.8 External bus status when the internal area is accessed
Item
SFR accessed
Internal RAM accessed
Address bus
Address output
Maintain status before accessed
address of external area
Data bus
When read
Floating
When write
Output data
Undefined
RD, WR, WRL, WRH
RD, WR, WRL, WRH output
Output "H"
BHE
BHE output
Maintain status before accessed
status of external area
CS
Output "H"
ALE
Output "L"
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