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参数资料
| 型号： | M30826MH-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件页数： | 9/48页 |
| 文件大小： | 847K |
| 代理商： | M30826MH-XXXFP |
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FIGURE 1.
LVDS OUTPUT OFFSET VOLTAGE (V
OS) is the midpoint
between the D+ and D- pins output voltage with respect to
ground; ie., [(V
D+) +( VD-)]/2.
MISSING CODES
are those output codes that are skipped
and will never appear at the ADC outputs. These codes can-
not be reached with any input value.
MSB (MOST SIGNIFICANT BIT)
is the bit that has the largest
value or weight. Its value is one half of full scale.
NEGATIVE FULL-SCALE ERROR (NFSE)
is a measure of
how far the first code transition is from the ideal 1/2 LSB above
a differential V
IN/2 with the FSR pin low. For the AD-
C08D1520 the reference voltage is assumed to be ideal, so
this error is a combination of full-scale error and reference
voltage error.
OFFSET ERROR (V
OFF) is a measure of how far the mid-
scale point is from the ideal zero voltage differential input.
Offset Error = Actual Input causing average of 8k samples to
result in an average code of 127.5.
OUTPUT DELAY (t
OD) is the time delay (in addition to
Pipeline Delay) after the falling edge of CLK+ before the data
update is present at the output pins.
OVER-RANGE RECOVERY TIME
is the time required after
the differential input voltages goes from ±1.2V to 0V for the
converter to recover and make a conversion with its rated ac-
curacy.
PIPELINE DELAY (LATENCY)
is the number of input clock
cycles between initiation of conversion and when that data is
presented to the output driver stage. New data is available at
every clock cycle, but the data lags the conversion by the
Pipeline Delay plus the t
OD.
POSITIVE FULL-SCALE ERROR (PFSE)
is a measure of
how far the last code transition is from the ideal 1-1/2 LSB
below a differential +V
IN/2. For the ADC08D1520 the refer-
ence voltage is assumed to be ideal, so this error is a combi-
nation of full-scale error and reference voltage error.
POWER SUPPLY REJECTION RATIO (PSRR)
can be one
of two specifications. PSRR1 (DC PSRR) is the ratio of the
change in full-scale error that results from a power supply
voltage change from 1.8V to 2.0V. PSRR2 (AC PSRR) is a
measure of how well an a.c. signal riding upon the power
supply is rejected from the output and is measured with a 248
MHz, 50 mV
P-P signal riding upon the power supply. It is the
ratio of the output amplitude of that signal at the output to its
amplitude on the power supply pin. PSRR is expressed in dB.
SIGNAL TO NOISE RATIO (SNR)
is the ratio, expressed in
dB, of the rms value of the input signal at the output to the rms
value of the sum of all other spectral components below one-
half the sampling frequency, not including harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/(N+D) or
SINAD)
is the ratio, expressed in dB, of the rms value of the
input signal at the output to the rms value of all of the other
spectral components below half the input clock frequency, in-
cluding harmonics but excluding d.c.
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
is the differ-
ence, expressed in dB, between the rms values of the input
signal at the output and the peak spurious signal, where a
spurious signal is any signal present in the output spectrum
that is not present at the input, excluding d.c.
TOTAL HARMONIC DISTORTION (THD)
is the ratio ex-
pressed in dB, of the rms total of the first nine harmonic levels
at the output to the level of the fundamental at the output. THD
is calculated as
where A
f1 is the RMS power of the fundamental (output) fre-
quency and A
f2 through Af10 are the RMS power of the first 9
harmonic frequencies in the output spectrum.
– Second Harmonic Distortion (2nd Harm)
is the differ-
ence, expressed in dB, between the RMS power in the input
frequency seen at the output and the power in its 2nd har-
monic level at the output.
– Third Harmonic Distortion (3rd Harm)
is the difference
expressed in dB between the RMS power in the input fre-
quency seen at the output and the power in its 3rd harmonic
level at the output.
17
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ADC08D1520QML
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