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8. Clock Generation Circuit
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8.1.3 On-chip Oscillator Clock
On-chip oscillator generates the on-chip oscillator clock. The 1MHz on-chip oscillator clock becomes a
clock source for the CPU clock and peripheral function clock.
The on-chip oscillator clock stops after reset. When the CM21 bit in the CM2 register is set to "1" (on-chip
oscillator clock), the on-chip oscillator starts oscillating. Instead of the main clock, the on-chip oscillator
clock becomes the clock source for the CPU clock and peripheral function clock.
8.1.3.1 Oscillation Stop Detect Function
When the main clock is terminated by external factors, the on-chip oscillator automatically starts oscil-
lating to generate another clock.
When the CM 20 bit is set to "1" (oscillation stop detect function enabled), the oscillation stop detect
interrupt request is generated as soon as the main clock stops. Simultaneously, the on-chip oscillator
starts oscillating. The on-chip oscillator clock takes place of the main clock as the clock source for the
CPU clock and peripheral function clock. Associated bits are set as follows:
CM21 bit = 1 (on-chip oscillator clock becomes the clock source of the CPU clock.)
CM22 bit = 1 (main clock stop is detected.)
CM23 bit = 1 (main clock stops) (See Figure 8.15)
8.1.3.2 How to Use Oscillation Stop Detect Function
The oscillation stop detect interrupt shares vectors with the watchdog timer interrupt. When both
oscillation stop detect interrupt and watchdog timer interrupt are used, read the CM22 bit with an
interrupt service routine to determine which interrupt request has been generated.
When the main clock resumes running after an oscillation stop is detected, set the main clock as the
clock source for the CPU clock and peripheral function clock. Figure 8.11 shows the procedure to
switch the on-chip oscillator clock to the main clock.
In low-speed mode, when the main clock is stopped by setting the CM20 bit to "1", the oscillation
stop detect interrupt request is generated. Simultaneously, the on-chip oscillator starts oscillating.
The sub clock remains the CPU clock. The on-chip oscillator clock becomes the clock source for
the peripheral function clock.
To enter wait mode while the oscillation stop detect interrupt function is in use, set the CM02 bit to
"0" (peripheral function clock does not stop in wait mode).
When the oscillation stop detect interrupt request is generated in wait mode, wait mode cannot be
exited by the oscillation stop detect interrupt. After the microcomputer exits wait mode, the oscilla-
tion stop detect interrupt is acknowledged first, followed by the interrupt used to exit wait mode.
The oscillation stop detect function is provided to handle main clock stop caused by external fac-
tors. Set the CM20 bit to "0" (oscillation stop detect function disabled) when the main clock is
terminated by program, i.e., entering stop mode or setting the CM05 bit is set to "1" (main clock
oscillation stop).
When the main clock frequency is 2MHz or less, the oscillation stop detect function is not available.
Set the CM20 bit to "0".