参数资料
型号: M34554EDFP
元件分类: 微控制器/微处理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP64
封装: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件页数: 13/140页
文件大小: 1079K
代理商: M34554EDFP
Rev.3.00
Aug 06, 2004
page 9 of 136
REJ03B0043-0300Z
4554 Group
PORT BLOCK DIAGRAMS
Port block diagram (1)
Register Y
Decoder
SD instruction
RD instruction
D0
S
RQ
Skip decision
(SZD instruction)
(Note 1)
FR10
(Note 2)
Register Y
Decoder
SD instruction
RD instruction
D1
S
RQ
Skip decision
(SZD instruction)
(Note 1)
FR11
(Note 2)
Register Y
Decoder
SD instruction
RD instruction
D2
S
RQ
Skip decision
(SZD instruction)
(Note 1)
FR12
(Note 2)
Register Y
Decoder
SD instruction
RD instruction
D3
S
RQ
Skip decision
(SZD instruction)
CLD
instruction
(Note 1)
FR13
(Note 2)
C/CNTR1
(Note 1)
(Notes 2 and 3)
Clock (input) for timer 3 event count
D
T
Q
R
W32
W61
Timer 3 underflow signal
SCP instruction
RCP instruction
S
R
W31
W30
Q
PWMOD
CLD
instruction
CLD
instruction
CLD
instruction
This symbol represents a parasitic diode on the port.
2: Applied potential to these ports must be VDD or less.
3: When CNTR1 input is selected, output transistor is turned OFF.
Notes 1:
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