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参数资料
| 型号： | M347S6453CTS-C7C |
| 厂商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | M374S6453CTS PC133/PC100 Unbuffered SDRAM DIMM |
| 中文描述： | M374S6453CTS PC133/PC100无缓冲SDRAM的内存 |
| 文件页数： | 6/11页 |
| 文件大小： | 165K |
| 代理商： | M347S6453CTS-C7C |
PC133/PC100 Unbuffered DIMM
M374S6453CTS
REV. 0.1 Sept. 2001
3.3V
1200
870
Output
50pF
V
OH
(DC) = 2.4V, I
OH
= -2mA
V
OL
(DC) = 0.4V, I
OL
= 2mA
Vtt = 1.4V
50
Output
50pF
Z0 = 50
(Fig. 2) AC output load circuit
(Fig. 1) DC output load circuit
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
AC OPERATING TEST CONDITIONS
(V
DD
= 3.3V
±
0.3V, T
A
= 0 to 70
°
C)
Parameter
Value
Unit
AC input levels (Vih/Vil)
2.4/0.4
V
Input timing measurement reference level
1.4
V
Input rise and fall time
tr/tf = 1/1
ns
Output timing measurement reference level
1.4
V
Output load condition
See Fig. 2
Parameter
Symbol
Version
Unit
Note
-7C
-7A
-1H
-1L
Row active to row active delay
t
RRD
(min)
15
15
20
20
ns
1
RAS to CAS delay
t
RCD
(min)
15
20
20
20
ns
1
Row precharge time
t
RP
(min)
15
20
20
20
ns
1
Row active time
t
RAS
(min)
45
45
50
50
ns
1
t
RAS
(max)
100
us
Row cycle time
t
RC
(min)
60
65
70
70
ns
1
Last data in to row precharge
t
RDL
(min)
2
CLK
2, 5
Last data in to Active delay
t
DAL
(min)
2 CLK + tRP
-
5
Last data in to new col. address delay
t
CDL
(min)
1
CLK
2
Last data in to burst stop
t
BDL
(min)
1
CLK
2
Col. address to col. address delay
t
CCD
(min)
1
CLK
3
Number of valid output data
CAS latency=3
2
ea
4
CAS latency=2
1
Notes :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
and then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. In 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported.
SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.
相关PDF资料 |
PDF描述 |
|---|---|
| M347S6453CTS-C1H | M374S6453CTS PC133/PC100 Unbuffered SDRAM DIMM |
| M347S6453CTS-C1L | M374S6453CTS PC133/PC100 Unbuffered SDRAM DIMM |
| M347S6453CTS-C7A | M374S6453CTS PC133/PC100 Unbuffered SDRAM DIMM |
| M374S6453CTS-L7C | M374S6453CTS PC133/PC100 Unbuffered SDRAM DIMM |
| M374S6453CTS | M374S6453CTS PC133/PC100 Unbuffered SDRAM DIMM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M347S6453CTS-L1H | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:M374S6453CTS PC133/PC100 Unbuffered SDRAM DIMM |
| M347S6453CTS-L1L | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:M374S6453CTS PC133/PC100 Unbuffered SDRAM DIMM |
| M3480 SL001 | 制造商:Alpha Wire 功能描述:CBL 7PR 24AWG SLT 1000' |
| M3480 SL002 | 制造商:Alpha Wire 功能描述:CBL 7PR 24AWG SLT 500' |
| M3480 SL005 | 制造商:Alpha Wire 功能描述:CBL 7PR 24AWG SLT 100' |
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