参数资料
型号: M37207EFSP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP64
封装: 0.750 INCH, 1.78 MM PITCH, PLASTIC, SDIP-64
文件页数: 96/122页
文件大小: 2193K
代理商: M37207EFSP
MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
74
ROM CORRECTION FUNCTION
This can correct program data in ROM. Up to 2 addresses (2 blocks)
can be corrected, a program for correction is stored in the ROM cor-
rection memory in RAM. The ROM memory for correction is 32 bytes
!2 blocks.
Block 1 : addresses 02C016 to 02DF16
Block 2 : addresses 02E016 to 02FF16
Set the address of the ROM data to be corrected into the ROM cor-
rection address register. When the value of the counter matches the
ROM data address in the ROM correction address, the main pro-
gram branches to the correction program stored in the ROM memory
for correction. To return from the correction program to the main pro-
gram, the op code and operand of the JMP instruction (total of 3
bytes) are necessary at the end of the correction program. When the
blocks 1 and 2 are used in series, the above instruction is not needed
at the end of the block 1.
The ROM correction function is controlled by the ROM correction
enable register.
Notes 1 : Specify the first address (op code address) of each
instruction as the ROM correction address.
2 : Use the JMP instruction (total of 3 bytes) to return from
the correction program to the main program.
3 : Do not set the same ROM correction address to the blocks
1 and 2.
Fig. 72. ROM Correction Address Registers
Fig. 73. ROM Correction Enable Register
021716
ROM correction address 1 (high-order)
021816
ROM correction address 1 (low-order)
021916
ROM correction address 2 (high-order)
021A16
ROM correction address 2 (low-order)
b7 b6 b5 b4 b3 b2 b1 b0
ROM correction enable register (RCR) [Address 021B16]
B
After reset RW
ROM Correction Enable Register
0
Block 1 enable bit (RC0)
Name
Functions
0: Disabled
1: Enabled
1
Block 2 enable bit (RC1)
0: Disabled
1: Enabled
4
to
7
Nothing is assigned. These bits are write disable bits. When
these bits are read out, the values are “0.”
0
RW
R—
0
2, 3 Fix these bits to“0.”
0
RW
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