参数资料
型号: M37271EF-XXXSP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP52
封装: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-52
文件页数: 14/98页
文件大小: 1411K
代理商: M37271EF-XXXSP
MITSUBISHI MICROCOMPUTERS
M37271MF-XXXSP
M37271EF-XXXSP, M37271EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
20
SERIAL I/O
The M37271MF-XXXSP has a built-in serial I/O which can either trans-
mit or receive 8-bit data in serial in the clock synchronous mode.
The serial I/O block diagram is shown in Figure 12. The synchroniz-
ing clock I/O pin (SCLK), and data output pin (SOUT) also function as
port P4, data input pin (SIN) also functions as port P1.
Bit 2 of the serial I/O mode register (address 021316) selects whether
the synchronizing clock is supplied internally or externally (from the
P46/SCLK pin). When an internal clock is selected, bits 1 and 0 select
whether f(XIN) is divided by 8, 16, 32, or 64. To use P45/SOUT and
P46/SCLK pins for serial I/O, set the corresponding bits of the port P4
direction register (address 00C916) to “0.” To use P17/SIN pin for
serial I/O, set the corresponding bit of the port P1 direction register
(address 00C316) to “0.”
Fig. 12. Serial I/O block diagram
The operation of the serial I/O function is described below. The func-
tion of the serial I/O differs depending on the clock source; external
clock or internal clock.
8
Serial I/O shift register (8)
Data bus
Serial I/O
interrupt request
Selection gate: Connect to
black colored
side at reset.
Synchronization
circuit
Frequency divider
1/8
1/4
1/16
SM1
SM0
Serial I/O counter (8)
SM5 : LSB
MSB
S
SM2
1/2
XIN
P17/SIN
P45/SOUT
P46/SCLK
1/2
(Address 021416)
XCIN
1/2
CM7
1/2
Note : When the data is set in the serial I/O register (address 0214 16), the register functions as the serial I/O shift register.
(Note)
CM : CPU mode register
SM : Serial I/O mode register
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