参数资料
型号: M37481M8-XXXFP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP44
封装: 10 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44
文件页数: 21/100页
文件大小: 1457K
代理商: M37481M8-XXXFP
MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
24
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Fig. 17 Block diagram of timer X and timer Y
PWM generating circuit
D
T
Q
Programmable one-shot
output circuit
T
Q
S
Programmable waveform
generation mode
Pulse output
mode
CNTR0 edge
selection bit
“1”
“0”
Programmable
one-shot
output mode
PWM mode
CNTR0 edge
selection bit
Timer X (low-order) latch Timer X (high-order) latch
Timer X (high-order)
Timer X (low-order)
Edge detecting circuit
Timer X stop control bit
Timer X count source
selection bit
Pulse width measurement mode
Pulse cycle measurement mode
CNTR0 edge
selection bit
“001”
“100”
“101”
“110”
Timer X
operating mode bits
Programmable one-shot
output mode
PWM mode
Output level latch
P30/INT0
P40/CNTR0
P40 direction
register
P40
latch
f(XIN)/2
f(XIN)/8
f(XIN)/16
“1”
“0”
“1”
“0”
INT0 interrupt
request
Timer X
interrupt request
Pulse output mode
D
T
Q
Programmable one-shot
output circuit
T
Q
S
Programmable waveform
generation mode
Pulse output
mode
CNTR1 edge
selection bit
“1”
“0”
Programmable
one-shot
output mode
PWM mode
CNTR1 edge
selection bit
Edge detecting circuit
Timer Y count source
selection bit
“001”
“100”
“101”
“110”
Timer Y
operating mode bits
Programmable one-shot
output mode
PWM mode
Output level latch
P31/INT1
P41/CNTR1
P41 direction
register
P41
latch
f(XIN)/2
f(XIN)/8
f(XIN)/16
“1”
“0”
Pulse output mode
Data bus
“1”
“0”
Programmable waveform generation mode
Timer X trigger selection bit
Timer Y stop control bit
D
T
Q
“1”
“0”
Programmable waveform generation mode
Timer Y trigger selection bit
CNTR1 edge
selection bit
“1”
“0”
“1”
“0”
INT0 edge selection bit
“1”
“0”
INT1 edge selection bit
Pulse width measurement mode
Pulse cycle measurement mode
PWM generating circuit
Timer Y (low-order) latch Timer Y (high-order) latch
Timer Y (high-order)
Timer Y (low-order)
CNTR0 interrupt
request
INT1 interrupt
request
Timer Y
interrupt request
CNTR1
interrupt
request
D
T
Q
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