
Rev.
No.
date
1.0
First Edition
970822
1.1
All pages; “PRELIMINARY Notice: This is not a final specification. Some parametric limits
981218
are subject to change.” eliminated.
Page 4;
Fig. 3; “Under development” eliminated.
Page 5;
Central Processing Unit (CPU);
The name of manual, 740 Family Software Manual, is revised.
Fig. 4; The bit name is revised.
Bits 6 and 7 explanations of CPU mode register are revised.
Fig. 5; Explanation is added.
Page 6;
Special page; Some words are corrected.
Page 7
Fig. 7 ; Some register names are revised.
Page 8
[Direction register] PiD; The sentence is revised.
→Pins set to output are floating.
Fig. 9; The Figure title is revised.
Page 12; Interrupts; Explanation is revised. The period is added.
Interrupt operation; The order of operation is revised.
Table 4: Remarks is revised. Some words are corrected.
Page 17; Serial I/O; Some words and the pin name position are revised.
Page 18; The register name is revised.
→ [UART status register] UARTSTS
Fig. 20; Some words are corrected.
Page 21 to Page 24; Some words are corrected.
Page 26; Serial I/O2; Some words are corrected.
Fig. 29; Explanation is revised.
Page 28; [A-D conversion register]AD;
The sentence is revised.
→Do not read out during an A-D conversion.
Page 29; Fig. 35; The sentence is revised.
→read-only for high-order 6-bit
Page 30; Fig. 37; The period is added.
Page 32; Wait mode; The sentence is revised.
→When the STP status is released, prescaler 12 and timer 1 will start counting clock
which is XIN divided by 16,.....
Page 34; One Time PROM Version; The sentences are revised.
→To improve the noise reduction, connect a track between CNMSS pin and VSS pin...
→The mask ROM version track of CNVSS pin has no operational interference...
Page 36; Absolute Maximum Ratings; Parameter of input voltage is revised. Note is revised.
Page 37; Recommended operating conditions; Limits of “H” input voltage is revised.
REVISION DESCRIPTION LIST
7532 Group DATA SHEET
(1/2)
Revision Description