参数资料
型号: M38030F8L-XXXWG
厂商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 单芯片8位CMOS微机
文件页数: 73/119页
文件大小: 1575K
代理商: M38030F8L-XXXWG
Rev.1.00
Apr 2, 2007
Page 57 of 117
REJ03B0212-0100
3803 Group (Spec.L)
PULSE WIDTH MODULATION (PWM)
The 3803 group (Spec.H QzROM version) has PWM functions
with an 8-bit resolution, based on a signal that is the clock input
XIN or that clock input divided by 2 or the clock input XCIN or
that clock input divided by 2 in low-speed mode.
Data Setting
The PWM output pin also functions as port P56. Set the PWM
period by the PWM prescaler, and set the “H” term of output
pulse by the PWM register.
If the value in the PWM prescaler is n and the value in the PWM
register is m (where n = 0 to 255 and m = 0 to 255):
PWM period = 255 × (n+1) / f(XIN)
= 31.875 × (n+1)
s
(when f(XIN) = 8 MHz, count source selection bit = “0”)
Output pulse “H” term = PWM period × m / 255
= 0.125 × (n+1) × m
s
(when f(XIN) = 8 MHz, count source selection bit = “0”)
PWM Operation
When bit 0 (PWM enable bit) of the PWM control register is set
to “1”, operation starts by initializing the PWM output circuit,
and pulses are output starting at an “H”.
If the PWM register or PWM prescaler is updated during PWM
output, the pulses will change in the cycle after the one in which
the change was made.
Fig 49. Timing of PWM period
Fig 50. Block diagram of PWM function
31.875
× m × (n+1)
255
s
T = [31.875
× (n+1)] s
PWM output
m : Contents of PWM register
n : Contents of PWM prescaler
T : PWM period
(when f(XIN) = 8 MHz, count source selection bit = “0”)
Data bus
Count source
selection bit
“0”
“1”
PWM
prescaler pre-latch
PWM
register pre-latch
PWM
prescaler latch
PWM
register latch
Transfer control circuit
PWM register
1/2
XIN
(XCIN at low-
speed mode)
Port P56 latch
PWM function enable bit
Port P56
PWM prescaler
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