参数资料
型号: M38067MC-XXXGP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80
封装: 0.65 MM PITCH, PLASTIC, QFP-80
文件页数: 5/58页
文件大小: 801K
代理商: M38067MC-XXXGP
MITSUBISHI MICROCOMPUTERS
3806 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
12
Pin
P00 – P07
P10 – P17
P20 – P27
P30 – P37
P40,P41
P42/INT0,
P43/INT1
P44/RXD,
P45/TXD,
P46/SCLK1,
_____
P47/SRDY1
P50
P51/INT2,
P52/INT3,
P53/INT4
P54/CNTR0,
P55/CNTR1
P56/DA1,
P57/DA2
P60/AN0
P67/AN7
P70/SIN2,
P71/SOUT2,
P72/SCLK2,
_____
P73/SRDY2
P74 – P77
P80 – P87
Name
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Port P7
Port P8
Input/Output
Input/output,
individual bits
Input/output,
individual bits
Input/output,
individual bits
Input/output,
individual bits
Input/output,
individual bits
Input/output,
individual bits
Input/output,
individual bits
Input/output,
individual bits
Input/output,
individual bits
I/O Format
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
N-channel open-drain output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
Non-Port Function
Address low-order byte
output
Address high-order
byte output
Data bus I/O
Control signal I/O
External interrupt input
Serial I/O1 function I/O
External interrupt input
Timer X and Timer Y
function I/O
D-A conversion output
A-D conversion input
Serial I/O2 function I/O
Ref.No.
(1)
(2)
(3)
(4)
(5)
(6)
(1)
(2)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(1)
Related SFRs
CPU mode register
Interrupt edge selection
register
Serial I/O1 control
register
UART control register
Interrupt edge selection
register
Timer XY mode register
AD/DA control register
Serial I/O2 control
register
Note 1: For details of the functions of ports P0 to P3 in modes other than single-chip mode, and how to use double-function ports as func-
tion I/O ports, refer to the applicable sections.
2: Make sure that the input level at each pin is either 0 V or VCC during execution of the STP instruction.
When an input level is at an intermediate potential, a current will flow from VCC to VSS through the input-stage gate.
I/O Ports
Direction registers
The 3806 group has 72 programmable I/O pins arranged in nine
I/O ports (ports P0 to P8). The I/O ports have direction registers
which determine the input/output direction of each individual pin.
Each bit in a direction register corresponds to one pin, each pin
can be set to be input port or output port.
When “0” is written to the bit corresponding to a pin, that pin be-
comes an input pin. When “1” is written to that bit, that pin be-
comes an output pin.
If data is read from a pin which is set to output, the value of the
port output latch is read, not the value of the pin itself. Pins set to
input are floating. If a pin set to input is written to, only the port
output latch is written to and the pin remains floating.
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