参数资料
型号: M38749M7T-XXXGP
厂商: Mitsubishi Electric Corporation
英文描述: DCM37PP
中文描述: 单芯片8位CMOS微机
文件页数: 30/92页
文件大小: 1292K
代理商: M38749M7T-XXXGP
30
3874 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
TIMERS
The 3874 group has five timers: timer X, timer Y, timer 1, timer 2,
and timer 3. Timer X and timer Y are 16-bit timers, and timer 1,
timer 2, and timer 3 are 8-bit timers.
All timers are down count timers. When the timer reaches “00
16
” or
“0000
16
”, an underflow occurs at the next count pulse and the cor-
responding timer latch is reloaded into the timer and the count is
continued. When a timer underflows, the interrupt request bit cor-
responding to that timer is set to “1”.
Read and write operation on 16-bit timer must be performed for
both high and low-order bytes. When reading a 16-bit timer, read
the high-order byte first. When writing to a 16-bit timer, write the
low-order byte first. The 16-bit timer cannot perform the correct op-
eration when reading during the write operation, or when writing
during the read operation.
Fig. 22 Timer block diagram
CNTR
active
edge switch bit
Timer 1 count source
selection bit
Real time port
control bit “0”
“1”
P5
5
/CNTR
1
“0”
X
IN
/16
(X
CIN
/16 in
φ
= X
CIN
/2)
1
active
CNTR
“10”
Timer Y stop
control bit
Timer Y (low) latch (8)
Falling edge detection
Period
Timer Y
interrupt
Pulse width HL continuously measurement mode
Rising edge detection
“00”,“01”,“11”
Timer Y operating
mode bit
Timer X
interrupt
Timer X mode register
write signal
P5
4
/CNTR
0
Q
Q
T
S
P5
4
direction register
Pulse output mode
P5
4
latch
Timer X stop
control bit
“0”
“1”
Timer X write
control bit
Q D
Latch
Q D
Latch
“1”
“0”
“1”
“10”
Timer X operat-
ing mode bit
“00”,“01”,“11”
X
IN
/16
(X
CIN
/16 in
φ
= X
CIN
/2)
Pulse width
measurement
mode
CNTR
active
edge switch bit
Pulse output mode
Q
Q
T
S
“0”
P5
0
direction register
P5
0
latch
“1”
T
output
active edge
switch bit “0”
Timer 2 write
control bit
“0”
“1”
T
output
control bit
“1”
P5
0
/T
OUT
X
CIN
Tim“1”
source selection bit
“0”
Timer 2
interrupt
Timer 3
interrupt
T
OUT
output control bit
X
IN
/16(X
CIN
/16 in
φ
= X
CIN
/2)
Timer 2 count source
selection bit
Timer 1
interrupt
Data bus
X
IN
/16
(X
CIN
/16 in
φ
= X
CIN
/2)
X
IN
/16
(X
CIN
/16 in
φ
= X
CIN
/2)
P5
6
direction register “0”
Real time port
control bit “1”
P5
6
/RTP
0
P5
latch
P5
7
direction register “0”
Real time port
control bit “1”
P5
7
/RTP
1
P5
7
latch
P5
6
data for real time port
P5
7
data for real time port
Timer Y (low) (8)
Timer Y (high) (8)
Timer 3 latch (8)
Timer 3 (8)
Timer 1 latch (8)
Timer 1 (8)
Timer 2 latch (8)
Timer 2 (8)
Timer X (low) (8)
Timer X (high) (8)
Timer X (low) latch (8)
Timer X (high) latch (8)
Timer Y (high) latch (8)
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