参数资料
型号: M38859M8-XXXHP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80
封装: 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件页数: 8/102页
文件大小: 1247K
代理商: M38859M8-XXXHP
3885 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
13
Pin
Name
Input/Output
I/O Structure
Non-Port Function
Ref.No.
Table 6 I/O port function (1)
Related SFRs
I/O PORTS
All I/O pins are programmable as input or output. All I/O ports
have direction registers which specify the data direction of each
pin like input/output. One bit in a direction register corresponds to
one pin. Each pin can be set to be input or output port.
Writing “0” to the bit corresponding to the pin, that pin becomes an
input mode. Writing “1” to the bit, that pin becomes an output
mode.
When the data is read from the bit of the port register correspond-
ing to the pin which is set to output, the value shows the port latch
data, not the input level of the pin. When a pin set to input, the pin
comes floating. In input port mode, writing the port register
changes only the data of the port latch and the pin remains high
impedance state.
When the P8 function selection bit of the port control register 2 is
set to “1”, reading from address 001016 reads the port P4 register,
and reading from address 001116 reads the port P7 register.
Especially, the input level of P42 to P46 pins and P70 to P75 pins
can be read regardless of the data of the direction registers in this
case.
P00-P07
P10–P17
P20/CMPREF
Port P0
Port P1
CMOS compatible
input level
CMOS 3-state output
or N-channel open-
drain output
Analog comparator
power source input pin
Port control register 1
(1)
(2)
Port control register 1
Port control register 2
P21–P27
P30/PWM00
P31/PWM10
Port P2
CMOS compatible
input level
CMOS 3-state output
(3)
(4)
(5)
Port control register 1
AD/DA control register
PWM output
Key-on wake up input
Comparator input
P32–P37
Port P3
(6)
Key-on wake up input
Comparator input
Port control register 1
P40/XCOUT
P41/XCIN
P42/INT0
P43/INT1
P44/RXD
Input/output,
individual bits
(7)
(8)
(9)
(10)
(11)
Sub-clock generating
circuit
CPU mode register
External interrupt input
Interrupt edge selection
register
Port control register 2
Serial I/O control register
Port control register 2
Serial I/O function input
P45/TXD
Port P4
CMOS compatible
input level
CMOS 3-state output
or N-channel open-
drain output
(12)
Serial I/O control register
UART control register
Port control register 2
Serial I/O function output
P46/SCLK
(13)
Serial I/O control register
Port control register 2
Serial I/O function I/O
P47/SRDY
/CLKRUN
Serial I/O control register
Serialized IRQ control
register
Serial I/O function output
Serialized IRQ function
output
(14)
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