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参数资料
| 型号： | M38C13E6FP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64 |
| 文件页数： | 2/59页 |
| 文件大小： | 704K |
| 代理商： | M38C13E6FP |
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Rev.2.40
Jun 14, 2004
page 10 of 56
38C1 Group
[CPU Mode Register (CPUM)] 003B16
The CPU mode register contains the stack page selection bit and
the internal system clock selection bit.
The CPU mode register is allocated at address 003B16.
After system is released from reset, the on-chip oscillator mode is
selected, and the XIN–XOUT oscillation and the XCIN–XCOUT oscil-
lation are stopped.
Fig. 7 Structure of CPU mode register
Not available
Processor mode bits
b1 b0
0
0 : Single-chip mode
0
1 :
1
0 :
1
1 :
Stack page selection bit
0 : 0 page
1 : 1 page
Main clock selection bit
0 : XIN input signal (XIN–XOUT oscillating)
1 : On-chip oscillator
(internal system clock: only frequency divided by 8 is valid.)
Port Xc switch bit
0 : I/O port function (Oscillation stop)
1 : XCIN–XCOUT oscillating function
XIN–XOUT oscillation stop bit
0 : Oscillating
1 : Stopped
Main clock division ratio selection bit
(this bit is invalid when on-chip oscillator is selected.)
0 : f(XIN)/2 (high-speed mode)
1 : f(XIN)/8 (middle-speed mode)
Internal system clock selection bit
0 : Main clock selected (middle-/high-speed, on-chip oscillator mode)
1 : XCIN–XCOUT selected (low-speed mode)
CPU mode register
(CPUM : address 003B16, initial value: 6816)
b7
b0
Fig. 8 Switching method of CPU mode register
N
Y
After releasing reset
Start the oscillation
(bits 4 and 5 of CPUM)
Switch the main clock division ratio
selection bits (bit 6 of CPUM)
Main routine
Start with a on-chip oscillator.
Initial value of CPUM is 6816.
As for the details of condition for
transition among each mode,
refer to the state transition of system clock.
Oscillator starts oscillation.
Do not change bit 3, bit 6 and bit 7
of CPUM until oscillation stabilizes.
Wait by on-chip oscillator operation until
establishment of oscillator clock
Low-, middle-, or high-speed mode ?
Select internal system clock
(bit 3 or bit 7 of CPUM)
System can operate in on-chip oscillator
mode until oscillation stabilize.
Select internal system clock.
Do not change bit 3 and bit 7, or bit 6 and bit 7
of CPUM at the same time.
Select main clock division ratio.
Switch to high-speed mode here, if necessary.
When the low-, middle- or high-speed mode is used after the XIN–
XOUT oscillation and the XCIN–XCOUT oscillation are enabled, wait
in the on-chip oscillator mode until oscillation stabilizes, and then,
switch the operation mode.
When the middle- and high-speed mode are not used (XIN-XOUT
oscillation and external clock input are not performed), connect
XIN to VCC through a resistor.
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