- 您现在的位置：买卖IC网 > PDF目录69016 > M41ST87WMX6TR (STMICROELECTRONICS) 1 TIMER(S), REAL TIME CLOCK, PDSO28 PDF资料下载
参数资料
| 型号： | M41ST87WMX6TR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封装： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, SOX-28 |
| 文件页数： | 9/48页 |
| 文件大小： | 457K |
| 代理商： | M41ST87WMX6TR |
第1页第2页第3页第4页第5页第6页第7页第8页当前第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页
M41ST87Y, M41ST87W
Operating modes
power input is switched from the VCC pin to the battery, and the clock registers and external
SRAM are maintained from the attached battery supply.
All outputs become high impedance. The VOUT pin is capable of supplying 100A (for
M41ST87W) or 150A (for M41ST87Y) of current to the attached memory with less than 0.3
volts drop under this condition. On power up, when VCC returns to a nominal value, write
protection continues for trec by inhibiting ECON. The RST signal also remains active during
this time (see Figure 27 on page 43).
Note:
Most low power SRAMs on the market today can be used with the M41ST87Y/W RTC
SUPERVISOR. There are, however some criteria which should be used in making the final
choice of an SRAM to use. The SRAM must be designed in a way where the chip enable
input disables all other inputs to the SRAM. This allows inputs to the M41ST87Y/W and
SRAMs to be “Don’t Care” once VCC falls below VPFD(min). The SRAM should also
guarantee data retention down to VCC = 2.0 volts. The chip enable access time must be
sufficient to meet the system needs with the chip enable output propagation delays
included. If the SRAM includes a second chip enable pin (E2), this pin should be tied to
VOUT.
If data retention lifetime is a critical parameter for the system, it is important to review the
data retention current specifications for the particular SRAMs being evaluated. Most SRAMs
specify a data retention current at 3.0 volts. Manufacturers generally specify a typical
condition for room temperature along with a worst case condition (generally at elevated
temperatures). The system level requirements will determine the choice of which value to
use. The data retention current value of the SRAMs can then be added to the IBAT value of
the M41ST87Y/W to determine the total current requirements for data retention. The
available battery capacity for the battery of your choice can then be divided by this current to
determine the amount of data retention available.
For a further more detailed review of lifetime calculations, please see Application Note
AN1012.
2.5
Tamper detection circuit
The M41ST87Y/W provides two independent input pins, the tamper pin 1 input (TP1IN) and
tamper pin 2 input (TP2IN), which can be used to monitor two separate signals which can
result in the associated setting of the tamper bits (TB1 and/or TB2, in flag register 0Fh) if the
tamper enable bits (TEB1 and/or TEB2) are enabled, for the respective tamper 1 or tamper
2. The TP1IN pin or TP2IN pin may be set to indicate a tamper event has occurred by either
1) closing a switch to ground or VOUT (normally open), or by 2) opening a switch that was
previously closed to ground or VOUT (normally closed), depending on the state of the TCMX
bits and the TPMX bits in the tamper register (14h and/or 15h).
2.6
Tamper register bits (tamper 1 and tamper 2)
2.6.1
Tamper enable bits (TEB1 and TEB2)
When set to a logic '1,' this bit will enable the tamper detection circuit. This bit must be set to
'0' in order to clear the associated tamper bits (TBX, in 0Fh).
Note:
TEBX should be reset whenever the tamper detect condition is modified.
相关PDF资料 |
PDF描述 |
|---|---|
| M41ST95WMX6 | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST95YMH6E | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST95YMH6 | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST95YMX6 | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41T00CAPPC1 | REAL TIME CLOCK, PDIP24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M41ST87WSS6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM |
| M41ST87WSS6F | 功能描述:实时时钟 128 NVRAM Serial RTC 3.0 to 3.6 Vcc RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| M41ST87Y | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5.0, 3.3, or 3.0V, 1280 bit (160 x8) Secure Serial RTC and NVRAM Supervisor with Tamper Detection |
| M41ST87Y_08 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM |
| M41ST87Y_10 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM |
发布紧急采购，3分钟左右您将得到回复。