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参数资料
| 型号： | M470L6524CU0-LA2 |
| 厂商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die |
| 中文描述： | DDR SDRAM的缓冲模块18 4针缓冲模块的基于C的512Mb芯片 |
| 文件页数： | 12/17页 |
| 文件大小： | 225K |
| 代理商： | M470L6524CU0-LA2 |
DDR SDRAM
256MB, 512MB Unbuffered SODIMM
Rev. 1.2 June 2005
The following specification parameters are required in systems using DDR333, DDR266 devices to ensure proper system performance.
these characteristics are for system simulation purposes and are guaranteed by design.
Table 1 :
Input Slew Rate for DQ, DQS, and DM
Table 2
:
Input Setup & Hold Time Derating for Slew Rate
Table 3 : Input/Output Setup & Hold Time Derating for Slew Rate
Table 4 : Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate
Table 5 : Output Slew Rate Characteristice (X4, X8 Devices only)
Table 6 : Output Slew Rate Characteristice (X16 Devices only)
Table 7 : Output Slew Rate Matching Ratio Characteristics
AC CHARACTERISTICS
DDR333
DDR266
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
Units
Notes
DQ/DM/DQS input slew rate measured between
VIH(DC), VIL(DC) and VIL(DC), VIH(DC)
DCSLEW
TBD
TBD
TBD
TBD
V/ns
a, m
Input Slew Rate
tIS
tIH
Units
Notes
0.5 V/ns
0
0
ps
i
0.4 V/ns
+50
0
ps
i
0.3 V/ns
+100
0
ps
i
Input Slew Rate
tDS
tDH
Units
Notes
0.5 V/ns
0
0
ps
k
0.4 V/ns
+75
+75
ps
k
0.3 V/ns
+150
+150
ps
k
Delta Slew Rate
tDS
tDH
Units
Notes
+/- 0.0 V/ns
0
0
ps
j
+/- 0.25 V/ns
+50
+50
ps
j
+/- 0.5 V/ns
+100
+100
ps
j
Slew Rate Characteristic
Typical Range
(V/ns)
Minimum
(V/ns)
Maximum
(V/ns)
Notes
Pullup Slew Rate
1.2 ~ 2.5
1.0
4.5
a,c,d,f,g,h
Pulldown slew
1.2 ~ 2.5
1.0
4.5
b,c,d,f,g,h
Slew Rate Characteristic
Typical Range
(V/ns)
Minimum
(V/ns)
Maximum
(V/ns)
Notes
Pullup Slew Rate
1.2 ~ 2.5
0.7
5.0
a,c,d,f,g,h
Pulldown slew
1.2 ~ 2.5
0.7
5.0
b,c,d,f,g,h
AC CHARACTERISTICS
DDR333
DDR266
PARAMETER
MIN
MAX
MIN
MAX
Notes
Output Slew Rate Matching Ratio (Pullup to Pulldown)
TBD
TBD
TBD
TBD
e,m
13.0 System Characteristics for DDR SDRAM
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| M470L3324CU0-LB0 | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die |
| M470L6524CU0-LB0 | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die |
| M470L3324CU0-LB3 | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die |
| M470L3324CU0-LCC | DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M470L6524CU0-LB0 | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die |
| M470L6524CU0-LB3 | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die |
| M470L6524CU0-LCC | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb C-die |
| M470L6524DU0 | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:DDR SDRAM Product Guide |
| M470L6524DU0-CA2 | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:DDR SDRAM Unbuffered Module 18 4 pin Unbuffered Module based on 512Mb D-die 66 TSOP-II & 54 sTSOP-II with Pb-Free (RoHS compliant) |
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