参数资料
型号: M48T02-150PC1
厂商: 意法半导体
英文描述: 16 Kbit 2Kb x8 TIMEKEEPER[ SRAM
中文描述: 16千位2KB的x8计时器[静态存储器
文件页数: 10/15页
文件大小: 94K
代理商: M48T02-150PC1
Stopping and Starting the Oscillator
The oscillator may be stopped at any time. If the
device is going to spend a significant amount of
timeon the shelf,the oscillatorcan be turnedoffto
minimize current drain on the battery. The STOP
bit is the MSB of the secondsregister.Setting it to
a’1’stopstheoscillator.TheM48T02/12isshipped
fromSTMicroelectronicswith the STOPbit setto a
’1’. When reset to a ’0’, the M48T02/12 oscillator
startswithin 1 second.
Calibrating the Clock
The M48T02/12 is driven by a quartz controlled
oscillatorwitha nominalfrequencyof 32,768Hz.A
typicalM48T02/12isaccuratewithin
±
1 minuteper
monthat 25
°
C withoutcalibration.The devicesare
tested not to exceed
±
35 ppm (parts per million)
oscillator frequency error at 25
°
C, which equates
to about
±
1.53minutes permonth. The oscillation
rate of any crystal changes with temperature(see
Figure10).Mostclockchipscompensateforcrystal
frequencyandtemperatureshifterrorwithcumber-
some trim capacitors. The M48T02/12 design,
however,employsperiodiccountercorrection.The
calibrationcircuit addsorsubtractscountsfromthe
oscillator dividercircuit at the divide by 256 stage,
asshownin Figure11.The numberof timespulses
are blanked (subtracted, negative calibration) or
split(added,positivecalibration)dependsuponthe
valueloadedinto the fivebit Calibrationbyte found
in the ControlRegister. Adding countsspeeds the
clockup, subtractingcounts slows the clock down.
The Calibration byte occupiesthe five lower order
bits in the Control register.This byte can be set to
represent any value between 0 and 31 in binary
form.The sixthbit isa signbit;’1’indicatespositive
calibration, ’0’ indicates negative calibration. Cali-
brationoccurswithina64 minutecycle.Thefirst62
minutes in the cycle may, once per minute, have
onesecondeithershortenedor lengthenedby 128
oscillator cycles. If a binary ’1’ is loaded into the
register, only the first 2 minutes in the 64 minute
cycle will be modified; if a binary 6 is loaded, the
first12 will be affected,and so on.
Therefore, each calibration step has the effect of
addingor subtracting256oscillatorcyclesforevery
125,829,120actualoscillatorcycles,that is+4.068
or–2.034ppm ofadjustmentpercalibrationstepin
thecalibrationregister.Assumingthatthe oscillator
is in factrunning at exactly32,768 Hz, each of the
31 increments in the Calibrationbyte would repre-
sent +10.7 or –5.35 seconds per month which
corresponds to a total range of +5.5 or –2.75
minutesper month.
Two methods are available for ascertaining how
muchcalibration a given M48T02/12may require.
The first involvessimply setting the clock, letting it
run for a month and comparing it to a known
accurate reference (like WWV broadcasts).While
thatmay seemcrude,it allowsthe designerto give
theend userthe abilityto calibrate his clock ashis
environmentmayrequire,evenafter thefinalprod-
uct is packaged in a non-user serviceable enclo-
sure.All the designerhasto do is providea simple
utility that accessesthe Calibrationbyte.
Address
Data
Function/Range
BCD Format
D7
D6
D5
D4
D3
D2
D1
D0
7FFh
10 Years
Year
Year
00-99
7FEh
0
0
0
10 M.
Month
Month
01-12
7FDh
0
0
10 Date
Date
Date
01-31
7FCh
0
FT
0
0
0
Day
Day
01-07
7FBh
0
0
10 Hours
Hours
Hour
00-23
7FAh
0
10 Minutes
Minutes
Minutes
00-59
7F9h
ST
10 Seconds
Seconds
Seconds
00-59
7F8h
W
R
S
Calibration
Control
Keys:
S =SIGN Bit
FT = FREQUENCYTEST Bit (Set to ’0’for normal clock operation)
R = READBit
W = WRITE Bit
ST = STOPBit
0
= Must be set to’0’
Table11. RegisterMap
10/15
M48T02, M48T12
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