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参数资料
| 型号： | M48T08-150MH1 |
| 厂商： | 意法半导体 |
| 英文描述： | 64 Kbit 8Kb x 8 TIMEKEEPER SRAM |
| 中文描述： | 64千位的8kB × 8计时器的SRAM |
| 文件页数： | 12/27页 |
| 文件大小： | 398K |
| 代理商： | M48T08-150MH1 |
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M48T08, M48T08Y, M48T18
12/27
Data Retention Mode
With valid V
CC
applied, the M48T08/18/08Y oper-
ates as a conventional BYTEWIDE static RAM.
Should the supply voltage decay, the RAM will au-
tomatically power-fail deselect, write protecting it-
self when V
CC
falls within the V
PFD
(max), V
PFD
(min) window. All outputs become high imped-
ance, and all inputs are treated as “Don't care.”
Note:
A power failure during a WRITE cycle may
corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's con-
tent. At voltages below V
PFD
(min), the user can be
assured the memory will be in a write protected
state, provided the V
CC
fall time is not less than t
F
.
The M48T08/18/08Y may respond to transient
noise spikes on V
CC
that reach into the deselect
window during the time the device is sampling
V
CC
. Therefore, decoupling of the power supply
lines is recommended.
When V
CC
drops below V
SO
, the control circuit
switches power to the internal battery which pre-
serves data and powers the clock. The internal
button cell will maintain data in the M48T08/18/
08Y for an accumulated period of at least 10 years
when V
CC
is less than V
SO
.
Note:
SNAPHAT
top when using the SOH28 package.
As system power returns and V
CC
rises above
V
SO
, the battery is disconnected and the power
supply is switched to external V
CC
.
Write protection continues until V
CC
reaches V
PFD
(min) plus t
rec
(min). E1 should be kept high or E2
low as V
CC
rises past V
PFD
(min) to prevent inad-
vertent WRITE cycles prior to system stabilization.
Normal RAM operation can resume t
rec
after V
CC
exceeds V
PFD
(max).
For more information on Battery Storage Life refer
to the Application Note AN1012.
Power-fail Interrupt Pin
The M48T08/18/08Y continuously monitors V
CC
.
When V
CC
falls to the power-fail detect trip point,
an interrupt is immediately generated. An internal
clock provides a delay of between 10μs and 40μs
before automatically deselecting the M48T08/18/
08Y. The INT pin is an open drain output and re-
quires an external pull up resistor, even if the inter-
rupt output function is not being used.
Requires
use
of
M4T32-BR12SH
相关PDF资料 |
PDF描述 |
|---|---|
| M48T129YSH | Hook-Up Wire; Conductor Size AWG:24; No. Strands x Strand Size:Solid; Jacket Color:Brown; Approval Bodies:UL, CSA; Approval Categories:UL AWM Style 1061; CSA AWM; Conductor Material:Copper; Conductor Plating:Tin RoHS Compliant: Yes |
| M48T129Y-85CS1 | 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM |
| M48T129Y-85PM1 | 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM |
| M48T129V-70CS1 | 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM |
| M48T129V-70PM1 | 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T08-150MH1E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Kbit 8Kb x 8 TIMEKEEPER SRAM |
| M48T08-150MH1F | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Kbit 8Kb x 8 TIMEKEEPER SRAM |
| M48T08-150MH1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:CMOS 8K x 8 TIMEKEEPER SRAM |
| M48T08-150PC | 制造商:STMicroelectronics 功能描述:SRAM TIMEKEEPER 64K 48T08 DIP28 |
| M48T08-150PC | 制造商:STMicroelectronics 功能描述:SRAM TIMEKEEPER 64K 48T08 DIP28 |
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