参数资料
型号: M48T212A-85MH6
厂商: 意法半导体
英文描述: 3.3V TIMEKEEPER CONTROLLER
中文描述: 3.3计时控制器
文件页数: 15/20页
文件大小: 165K
代理商: M48T212A-85MH6
15/20
M48T212A
BATTERY LOW WARNING
The M48T212A automatically performs battery
voltage monitoring upon power-up and at factory-
programmed time intervals of approximately 24
hours. The Battery Low (BL) bit, Bit D4 of Flags
Register 0h, will be asserted if the battery voltage
is found to be less than approximately 2.5V. The
BL bit will remain asserted until completion of bat-
tery replacement and subsequent battery low
monitoring tests, either during the next power-up
sequence or the next scheduled 24-hour interval.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below ap-
proximately 2.5 volts and may not be able to
maintain data integrity in the SRAM. Data should
be considered suspect and verified as correct. A
fresh battery should be installed.
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
promised due to the fact that a nominal Vcc is
supplied. In order to insure data integrity during
subsequent periods of battery back-up mode, the
battery should be replaced. The battery should be
replaced with V
CC
powering the device to avoid
data loss.
The M48T212A only monitors the battery when a
nominal Vcc is applied to the device. Thus applica-
tions which require extensive durations in the bat-
tery back-up mode should be powered-up
periodically (at least once every few months) in or-
der for this technique to be beneficial.
Additionally, if a battery low is indicated, data in-
tegrity should be verified upon power-up via a
checksum or other technique.
Note
: Battery Low warning is only valid when us-
ing a 3V button cell battery. Use a super capacitor
for back-up supply causes the BL flag to be invalid.
INITIAL POWER-ON DEFAULTS
Upon application of power to the device, the fol-
lowing register bits are set to a ’0' state: WDS,
BMB0-BMB4, RB0-RB1, AFE, ABE, W and FT
(See Table 16).
Table 14. Reset AC Characteristics
(T
A
= 0 to 70°C; V
CC
= 3V to 3.6V)
Symbol
Note: 1. Pulse width less than 50ns will result in no RESET (for noise immunity).
2. Pulse width less than 20ms will result in no RESET (for noise immunity).
3. C
L
= 5pF (see Figure 4).
Table 15. Crystal Electrical Characteristics (Externally Supplied)
Note: Load capacitors are integrated within the M48T212A. Circuit board layout considerations for the 32kHz crystal of minimum trace
lengths and isolation from RF generating signals should be taken into account. ST recommends the KDS DT-38 Tuning Fork Type
quartz crystal for all temperature operations. KDS can be contacted at 913-491-6825 or at http://www.kdsj.co.jp for forther information
on this crystal type.
Parameter
Min
Max
Unit
t
R1
(1)
RSTIN1 Low to RSTIN1 High
200
ns
t
R2
(2)
RSTIN2 Low to RSTIN2 High
100
ms
t
R1HRH
(3)
RSTIN1 High to RST High
40
200
ms
t
R2HRH
(3)
RSTIN2 High to RST High
40
200
ms
Symbol
Description
Min
Typ
Max
Unit
f
O
Resonant Frequency
32,768
kHz
R
S
Series Resistance
50
70
k
C
L
Load Capacitance
12.5
pF
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