参数资料
型号: M48T212V-85MH6F
厂商: STMICROELECTRONICS
元件分类: 时钟/数据恢复及定时提取
英文描述: REAL TIME CLOCK, PDSO44
封装: 0.330 INCH, LEAD FREE, PLASTIC, SOH-44
文件页数: 6/32页
文件大小: 473K
代理商: M48T212V-85MH6F
M48T212Y, M48T212V
14/32
CLOCK OPERATION
TIMEKEEPER Registers
The M48T212Y/V offers 16 internal registers
which contain TIMEKEEPER, Alarm, Watchdog,
Flag, and Control data. These registers are mem-
ory locations which contain external (user accessi-
ble) and internal copies of the data (usually
referred to as BiPORT TIMEKEEPER cells).
The external copies are independent of internal
functions except that they are updated periodically
by the simultaneous transfer of the incremented
internal copy. TIMEKEEPER and Alarm Registers
store data in BCD. Control, Watchdog and Flags
Registers store data in Binary Format.
Reading the Clock
Updates to the TIMEKEEPER registers should be
halted before clock data is read to prevent reading
data in transition. The BiPORT TIMEKEEPER
cells in the RAM array are only data registers and
not the actual clock counters, so updating the reg-
isters can be halted without disturbing the clock it-
self.
Updating is halted when a '1' is written to the
READ Bit, D6 in the Control Register (8h). As long
as a '1' remains in that position, updating is halted.
After a halt is issued, the registers reflect the
count; that is, the day, date, and time that were
current at the moment the halt command was is-
sued.
All of the TIMEKEEPER registers are updated si-
multaneously. A halt will not interrupt an update in
progress. Updating occurs 1 second after the
READ Bit is reset to a '0.'
Setting the Clock
Bit D7 of the Control Register (8h) is the WRITE
Bit. Setting the WRITE Bit to a '1,' like the READ
Bit, halts updates to the TIMEKEEPER registers.
The user can then load them with the correct day,
date, and time data in 24 hour BCD format (see
Resetting the WRITE Bit to a '0' then transfers the
values of all time registers (Fh-9h, 1h) to the actual
TIMEKEEPER counters and allows normal opera-
tion to resume. After the WRITE Bit is reset, the
next clock update will occur one second later.
Note: Upon power-up following a power failure,
the READ Bit will automatically be set to a '1.' This
will prevent the clock from updating the TIME-
KEEPER registers, and will allow the user to read
the exact time of the power-down event.
Resetting the READ Bit to a '0' will allow the clock
to update these registers with the current time.
The WRITE Bit will be reset to a '0' upon power-up.
Stopping and Starting the Oscillator
The oscillator may be stopped at any time. If the
device is going to spend a significant amount of
time on the shelf, the oscillator can be turned off to
minimize current drain on the battery. The STOP
Bit is located at Bit D7 within the Seconds Register
(9h). Setting it to a '1' stops the oscillator. When re-
set to a '0,' the M48T212Y/V oscillator starts within
one second.
Note: It is not necessary to set the WRITE Bit
when setting or resetting the FREQUENCY TEST
Bit (FT) or the STOP Bit (ST).
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