参数资料
型号: M48T212Y-70MH1
厂商: 意法半导体
英文描述: 5V/3.3V TIMEKEEPER[ CONTROLLER
中文描述: 5V/3.3V计时[控制器
文件页数: 16/23页
文件大小: 150K
代理商: M48T212Y-70MH1
M48T212Y, M48T212V
16/23
Calibrating the Clock
The M48T212Y/V is driven by a quartz controlled
oscillator with a nominal frequency of 32,768 Hz.
The devices are tested not to exceed
±
35 PPM
(parts per million) oscillator frequency error at
25
°
C, which equates to about
±
1.53 minutes per
month. WhentheCalibration circuitis properly em-
ployed, accuracy improves to better than +1/–2
PPM at 25
°
C.
The oscillation rate of crystals changes with tem-
perature. The M48T212Y/V design employs peri-
odic counter correction. The calibration circuit
adds or subtractscounts from the oscillator divider
circuit at the divide by 256 stage, as shown in Fig-
ure 11. The number of times pulses which are
blanked (subtracted, negative calibration) or split
(added, positive calibration) depends upon the
value loaded into the five Calibration bits found in
the Control Register. Adding counts speeds the
clock up, subtracting counts slows the clock down.
The Calibration bits occupy the five lower order
bits (D4-D0) in the Control Register 8h. These bits
can be set to represent any value between 0 and
31 in binary form. Bit D5 is a Sign bit; ‘1’ indicates
positive calibration, ‘0’ indicates negative calibra-
tion. Calibration occurs within a 64 minute cycle.
The first 62 minutes in the cycle may, once per
minute, have one second either shortened by 128
or lengthened by 256 oscillator cycles.
If a binary ‘1’ is loaded into the register, only the
first 2 minutes in the 64 minute cycle will be modi-
fied; if a binary 6 is loaded, the first 12 will be af-
fected, and so on.
Therefore, each calibration step has the effect of
adding 512 or subtracting 256 oscillator cycles for
every 125,829,120 actual oscillator cycles, that is
+4.068 or –2.034 PPM of adjustment per calibra-
tion step in the calibration register. Assuming that
the oscillatoris running at exactly 32,768 Hz, each
of the 31 increments in the Calibration byte would
Figure 11. Calibration Waveform
AI00594B
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION
represent +10.7 or –5.35 seconds per month
which correspondsto a total range of+5.5 or –2.75
minutes per month.
Two methods are available for ascertaining how
much calibration a given M48T212Y/V may re-
quire. The first involves setting the clock, letting it
run for a month and comparing it to a known accu-
rate reference and recordingdeviation over a fixed
period of time. Calibration values, including the
number of seconds lost or gained in a given peri-
od, can be found in Application Note AN934:
TIMEKEEPER Calibration.
This allows the designer to give the end user the
ability to calibrate the clock as the environment re-
quires, even if the final product is packaged in a
non-user serviceable enclosure. The designer
could provide a simple utility that accesses the
Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of the
IRQ/FT pin. The pinwill toggle at 512Hz, when the
Stop bit (ST, D7of 9h) is ‘0’,the Frequency Test bit
(FT, D6 of Ch) is ‘1’, the Alarm Flag Enable bit
(AFE, D7 of 6h) is ‘0’, and the Watchdog Steering
bit (WDS, D7of 7h) is‘1’ or theWatchdog Register
(7h=0) is reset.
Any deviation from 512 Hz indicates the degree
and direction of oscillatorfrequency shift atthe test
temperature.
For
example,
512.010124 Hz would indicate a +20 PPM oscilla-
tor frequency error, requiring a –10 (WR001010)
to be loaded into the Calibration Byte for correc-
tion. Note that setting or changing the Calibration
Byte does not affect the Frequency testoutput fre-
quency.
The IRQ/FT pin is an open drain output which re-
quires a pull-up resistor to V
CC
for proper opera-
tion. A500-10k
resistor is recommended inorder
to control the rise time. The FT bit is cleared on
power-up.
a
reading
of
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