参数资料
型号: M4A3-96/48-10VI
厂商: Lattice Semiconductor Corporation
文件页数: 1/62页
文件大小: 0K
描述: IC CPLD ISP 4A 96MC 100TQFP
标准包装: 90
系列: ispMACH® 4A
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 10.0ns
电压电源 - 内部: 3 V ~ 3.6 V
宏单元数: 96
输入/输出数: 48
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-TQFP(14x14)
包装: 托盘
Publication# ISPM4A
Rev: M
Amendment/0
Issue Date: September 2006
Lead-
Free
Package
Options
Available!
ispMACH 4A CPLD Family
High Performance E2CMOS
In-System Programmable Logic
FEATURES
High-performance, E2CMOS 3.3-V & 5-V CPLD families
Flexible architecture for rapid logic designs
— Excellent First-Time-FitTM and ret feature
— SpeedLockingTM performance for guaranteed xed timing
— Central, input and output switch matrices for 100% routability and 100% pin-out retention
High speed
— 5.0ns tPD Commercial and 7.5ns tPD Industrial
— 182MHz fCNT
32 to 512 macrocells; 32 to 768 registers
44 to 388 pins in PLCC, PQFP, TQFP, BGA, fpBGA and caBGA packages
Flexible architecture for a wide range of design styles
— D/T registers and latches
— Synchronous or asynchronous mode
— Dedicated input registers
— Programmable polarity
— Reset/ preset swapping
Advanced capabilities for easy system integration
— 3.3-V & 5-V JEDEC-compliant operations
— JTAG (IEEE 1149.1) compliant for boundary scan testing
— 3.3-V & 5-V JTAG in-system programming
— PCI compliant (-5/-55/-6/-65/-7/-10/-12 speed grades)
— Safe for mixed supply voltage system designs
— Programmable pull-up or Bus-FriendlyTM inputs and I/Os
— Hot-socketing
— Programmable security bit
— Individual output slew rate control
Advanced E2CMOS process provides high-performance, cost-effective solutions
Lead-free package options
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