参数资料
型号: M50FW040K5TP
厂商: 意法半导体
英文描述: 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory
中文描述: 4兆位(512 KB的× 8,均匀块)3 - V电源供电的闪存固件枢纽
文件页数: 14/53页
文件大小: 278K
代理商: M50FW040K5TP
Signal descriptions
M50FW040
14/53
2.1.10
Write Protect (WP)
The Write Protect input is used to prevent the Main Blocks (Blocks 0 to 6) from being
changed. When Write Protect, WP, is set Low, V
IL
, Program and Erase operations in the
Main Blocks have no effect, regardless of the state of the Lock Register. When Write
Protect, WP, is set High, V
IH
, the protection of the Block determined by the Lock Register.
The state of Write Protect, WP, does not affect the protection of the Top Block (Block 7).
Write Protect, WP, must be set prior to a Program or Erase operation is initiated and must
not be changed until the operation completes or unpredictable results may occur. Care
should be taken to avoid unpredictable behavior by changing WP during Program or Erase
Suspend.
2.1.11
Reserved for future use (RFU)
These pins do not have assigned functions in this revision of the part. They must be left
disconnected.
2.2
Address/Address multiplexed (A/A Mux) signal descriptions
For the Address/Address Multiplexed (A/A Mux) Interface see <Blue>Figure 1., Logic
diagram (FWH interface), and <Blue>Table 1., Signal names (FWH interface).
2.2.1
Address inputs (A0-A10)
The Address Inputs are used to set the Row Address bits (A0-A10) and the Column
Address bits (A11-A18). They are latched during any bus operation by the Row/Column
Address Select input, RC.
2.2.2
Data Inputs/Outputs (DQ0-DQ7)
The Data Inputs/Outputs hold the data that is written to or read from the memory. They
output the data stored at the selected address during a Bus Read operation. During Bus
Write operations they represent the commands sent to the Command Interface of the
internal state machine. The Data Inputs/Outputs, DQ0-DQ7, are latched during a Bus Write
operation.
2.2.3
Output Enable (G)
The Output Enable, G, controls the Bus Read operation of the memory.
2.2.4
Write Enable (W)
The Write Enable, W, controls the Bus Write operation of the memory’s Command Interface.
2.2.5
Row/Column Address Select (RC)
The Row/Column Address Select input selects whether the Address Inputs should be
latched into the Row Address bits (A0-A10) or the Column Address bits (A11-A18). The
Row Address bits are latched on the falling edge of RC whereas the Column Address bits
are latched on the rising edge.
相关PDF资料
PDF描述
M50FW040N5G 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory
M50FW040N5P 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory
M50FW040N5TG 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory
M50FW040N5TP 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory
M50FW040NB5G 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory
相关代理商/技术参数
参数描述
M50FW040N 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
M50FW040N1 功能描述:闪存 3.6V 4M (512Kx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel
M50FW040N1T 功能描述:闪存 3.6V 4M (512Kx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel
M50FW040N5 功能描述:闪存 3.0-3.6V 4M (512Kx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel
M50FW040N5G 功能描述:闪存 SERIAL FLASH RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel