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参数资料
| 型号： | M5M5V4R04J-15 |
| 厂商： | Mitsubishi Electric Corporation |
| 元件分类： | 圆形连接器 |
| 英文描述： | Circular Connector; No. of Contacts:23; Series:; Body Material:Aluminum; Connecting Termination:Solder; Connector Shell Size:16; Circular Contact Gender:Pin; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:16-23 |
| 中文描述： | 4194304位（1048576 - Word的4位）的CMOS静态RAM |
| 文件页数： | 2/6页 |
| 文件大小： | 56K |
| 代理商： | M5M5V4R04J-15 |
M5M5V4R04J-12,-15
4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM
MITSUBISHI
ELECTRIC
MITSUBISHI LSIs
2
The operation mode of the M5M5V4R04J is determined by a
combination of the device control inputs S, W and OE. Each
mode is summarized in the function table.
A write cycle is executed whenever the low level W overlaps
with the low level S. The address must be set-up before the
write cycle and must be stable during the entire cycle.
The data is latched into a cell on the trailing edge of W or
S, whichever occurs first, requiring the set-up and hold time
relative to these edge to be maintained. The output enable
input OE directly controls the output stage. Setting the OE at
a high level, the output stage is in a high impedance state,
and the data bus
FUNCTION TABLE
contention problem in the write cycle is eliminated.
A read cycle is excuted by setting W at a high level and
OE at a low level while S are in an active state (S=L).
When setting S at high level, the chip is in a non-
selectable mode in which both reading and writing are
disable. In this mode, the output stage is in a high-
impedance state, allowing OR-tie with other chips and
memory expansion by S.
Signal-S controls the power-down feature. When S goes
high, power dissapation is reduced extremely. The access
time from S is equivalent to the address access time.
FUNCTION
Icc
S
H
L
L
L
W
X
L
H
OE
X
X
L
Mode
Non selection
Stand by
ABSOLUTE MAXIMUM RATINGS
DQ
High-impedance
Write
Read
Active
Active
Din
Dout
High-impedance
Active
H
H
Operating temperature
V
cc
V
I
V
O
P
d
T
opr
T
stg
V
V
V
mW
-2.0 ~ 4.6
1000
0 ~ 70
Parameter
Supply voltage
Input voltage
Output voltage
Power dissipation
Storage temperature
(bias)
Symbol
Unit
Conditions
With respect to GND
Ratings
T
stg(bias)
Storage temperature
-10 ~ 85
V
IH
V
IL
V
OH
V
OL
I
I
V
V
V
V
μ
A
μ
A
Vcc+0.3
0.8
2.0
2.4
0.4
Symbol
Parameter
Max
Typ
Limits
Min
Condition
Unit
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Input current
I
CC1
I
CC2
I
CC3
mA
mA
160
I
OZ
2
10
AC
DC
10
Active supply current
(TTL level)
Stand by current
(TTL level)
Output current in off-state
Stand by current
90
100
150
12ns cycle
15ns cycle
mA
75
AC
DC
50
70
12ns cycle
15ns cycle
1
-2.0 ~ VCC+0.5
-2.0 ~ VCC+0.5
-65 ~ 150
C
C
C
Ta=25 C
*Pulse width
≤
20ns, In case of DC:-0.5V
DC ELECTRICAL CHARACTERISTICS
(Ta=0 ~ 70 C, Vcc=3.3V unless otherwise noted)
-0.3
I
OH
=-4mA
I
OL
= 8mA
V
I
= 0~Vcc
V
I (S)
= V
IH
V
O
= 0~Vcc
V
I (S)
= V
IL
other inputs V
IH
or V
IL
Output-open(duty 100%)
V
I (S)
=
Vcc
≥
0.2V
other inputs V
I
≤
0.2V
or V
I
≥
Vcc-0.2V
V
I (S)
= V
IH
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| M5M5V4R08J-12 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM |
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