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参数资料
| 型号： | M64895GP |
| 厂商： | Mitsubishi Electric Corporation |
| 英文描述： | I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR |
| 中文描述： | I2C总线的电视频率合成器/录像机 |
| 文件页数： | 4/6页 |
| 文件大小： | 45K |
| 代理商： | M64895GP |
MITSUBISHI IC
S
(TV)
M64895FP/GP
I
2
C BUS FREQUENCY SYNTHESIZER FOR TV/VCR
4
PRELIMINARY
Notice:This is not a final specification.
Some parametric limits are subject to change.
METHOD OF SETTING DATA
The input information to consit of 2 or data of 4bytes to lead to Chip
Address is received in I
2
Cbus receiver. It shows a definition of bus
protocol admitted in the following.
1_STA CA
CB
BB
2_STA CA
D1
D2
3_STA CA
CB
BB
4_STA CA
D1
D2
STA : Start condition
STO : Stop condition
CA
: Chip address
CB
: Control data byte
BB
: BandS.W. data byte
D1
: Divider data byte
D2
: Divider data byte
STO
STO
D1
CB
D2
BB
STO
STO
The information of 5 bytes necessary for circuit operation is chip
address and control data, bandS.W. data of 2 bytes and divider byte
of 2 bytes. After the chip address input, 2 or data of 4 bytes are
received.
Function bit is contained the first and the third data byte to
distinguish between divider data and control data, band data, and
"0" goes ahead of divider data, and "1" goes ahead of control data,
bandS.W. data.
Write mode format
Byte
MSB
1
0
N7
1
X
LSB
A
A
A
A
A
Address Byte
Devider Byte1
Devider Byte2
Control Byte1
Band SW Byte
1
0
0
0
MA1
N10
N2
RSa
BS3
MA0
N9
N1
RSb
BS2
0
N14
N6
CP
X
N13
N5
T2
X
N12
N4
T1
X
N11
N3
T0
BS4
N8
N0
OS
BS1
ADDRESS
CA
0
ACK
DATA
ACK
DATA
ACK
1-7
8
9
1-7
8
9
1-7
8
9
SDA
SCL
S
STA
P
STO
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