参数资料
型号: M68HC11
厂商: Motorola, Inc.
英文描述: Technical Data
中文描述: 技术数据
文件页数: 2/31页
文件大小: 346K
代理商: M68HC11
Motorola Master Selection Guide
Single-Chip Microcontrollers (AMCU)
2.6–2
M68HC11 Family
The M68HC11 Family incorporates a flexible central
processing unit and a large number of control–oriented
on–chip peripherals. M68HC11 MCU are upward code
compatible with M6800, M6801, and M68HC05 software.
Central Processing Unit
The M68HC11 CPU is optimized for low power
consumption and high–performance operation at bus
frequencies up to 4 MHz. Key features include:
Two 8–bit or one 16–bit accumulator
Two 16–bit index registers
Powerful bit–manipulation instructions
Six powerful addressing modes
Immediate, Extended, Direct, Indexed, Inherent, and
Relative
Power saving STOP and WAIT modes
Memory mapped I/O and special functions
16x16 Integer and Fractional Divides
8x8 Multiply
Timer
M68HC11 timer architecture is based on a 16–bit free
running counter driven through a software–programmable
prescaler. Features include multiple Input Captures, Output
Compares, Real–Time Interrupt, Pulse Accumulator, and
Watchdog functions.
On–Chip Memory
Since its introduction, the M68HC11 Family has provided
versatile combinations of popular memory technologies,
including the first EEPROM on a CMOS microcontroller. The
family has a memory option to fit virtually any application.
ROM sizes range from 0 to 32K bytes. ROM is typically
factory programmed to contain custom software.
ROMless versions of most M68HC11 Family members
are also available.
RAM sizes range from 192 bytes to 1.25K bytes.
M68HC11 RAM utilizes a fully static design, and all
devices feature a standby power supply pin for battery
back–up of RAM contents.
EPROM sizes range from 4K to 32K bytes. EPROM is
especially suited to prototype development and small
production runs. EPROM versions are available in both
windowed and OTP packaging.
EEPROM sizes range from 0 to 2K bytes. EEPROM is
ideal for storage of calibration, diagnostic, data logging,
and security information. Each M68HC11 device with
EEPROM includes an on–chip charge pump to facilitate
single–supply programming and erasing.
Digital–to–Analog Conversion
The M68HC11 Family provides powerful, on–chip,
multi–channel A/D converter systems. Multi–conversion and
multi–channel options allow single or continuous conversion
on single or multiple channels. M68HC11 A/D systems have
eight input channels, and most offer 8–bit resolution, although
some provide 10–bit resolution. A 2 channel, 8–bit D/A is also
available.
Pulse–Width Modulation
Some M68HC11 Family members have up to six channels
of 8–bit PWM. At a 4 MHz bus frequency, signals can be
produced from 40 KHz to less than 10 Hz. PWM signals with
a period greater than one minute are possible in the 16–bit
mode.
Serial Communication
All members of the M68HC11 Family include a Serial
Peripheral Interface (SPI) and a Serial Communications
Interface (SCI). These on–chip peripherals are designed to
minimize CPU intervention during data transfer.
The SCI is a full duplex UART–type asynchronous
system that uses standard Non–Return–to–Zero (NRZ)
data format. An on–chip Baud rate generator derives
standard rates from the microcontroller oscillator. Both
transmitter and receiver are double buffered.
The SPI is a four–wire synchronous communications
interface used for high–speed communication with
specialized peripheral devices and other microcontrollers.
Data is transmitted and received simultaneously; the
Baud rate is software programmable.
Digital I/O and Special Functions
M68HC11 Family I/O is extremely flexible, allowing pins to
be configured to match application requirements. Most I/O
lines are controlled by bits in a Data Direction Register (DDR)
which can configure pins for either input or output. Most lines
have a dedicated port data latch.
Some M68HC11 Family members include a 4–channel
Direct Memory Access (DMA) and a Memory Management
Unit (MMU). The DMA provides fast data transfer between
memories and registers, and includes externally mapped
memory in the expanded mode. The MMU allows up to 1
megabyte of address space in a physical 64 kbyte allocation.
Integrated chip selects help to reduce glue logic.
Several members of the M68HC11 Family also include
programmable chip select circuits. These circuits can be used
to enable external peripherals whenever an access to a
predefined block of memory addresses is made. These
circuits help to reduce external logic requirements.
Math Coprocessor
New M68HC11 Family members offer a 16–bit on–chip
math coprocessor that accelerates multiply and divide
operations by as much as 10 times. The coprocessor
functions independently of the CPU and requires no special
instructions. The coprocessor is well–suited to low–bandwidth
DSP functions such as closed loop control, servo positioning,
and signal conditioning.
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