参数资料
型号: M74HC74M1R
厂商: STMICROELECTRONICS
元件分类: 锁存器
英文描述: HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封装: SOP-14
文件页数: 8/12页
文件大小: 455K
代理商: M74HC74M1R
M74HC74
5/12
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per FLIP/
FLOP)
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
tTLH tTHL Output Transition
Time
2.0
30
75
95
110
ns
4.5
8
151922
6.0
7
131619
tPLH tPHL Propagation Delay
Time (CK - Q, Q)
2.0
48
150
190
225
ns
4.5
16
30
38
45
6.0
13
26
32
38
tPLH tPHL Propagation Delay
Time (CLR, PR -
Q, Q)
2.0
51
150
190
225
ns
4.5
17
30
38
45
6.0
15
26
32
38
fMAX
Maximum Clock
Frequency
2.0
6.2
21
5
4.2
MHz
4.5
31
63
25
21
6.0
37
67
30
25
tW(H)
tW(L)
Minimum Pulse
Width (CK)
2.0
18
75
95
110
ns
4.5
6
151922
6.0
6
131619
tW(L)
Minimum Pulse
Width (CLR, PR)
2.0
21
75
95
110
ns
4.5
7
151922
6.0
6
131619
ts
Minimum Set-up
Time
2.0
15
75
95
110
ns
4.5
4
151922
6.0
3
131619
th
Minimum Hold
Time
2.0
0
ns
4.5
0
6.0
0
tREM
Minimum Removal
Time (CLR, PR to
CK)
2.0
0
253035
ns
4.5
0
5
6
7
6.0
0
4
5
6
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
CIN
Input Capacitance
5.0
5
101010
pF
CPD
Power Dissipation
Capacitance (note
1)
5.0
34
pF
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