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参数资料
| 型号： | M80XXLFXI |
| 厂商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | OTHER CLOCK GENERATOR, QCC24 |
| 封装： | 4 X 4 MM, LEAD FREE, MO-220, QFN-24 |
| 文件页数： | 1/17页 |
| 文件大小： | 526K |
| 代理商： | M80XXLFXI |
MoBL Clock
M4000/M8000
Four-PLL Programmable Clock Generator
for Portable Applications
Cypress Semiconductor Corporation
198 Champion Court
San Jose
, CA 95134-1709
408-943-2600
Document Number: 001-29179 Rev. *C
Revised December 7, 2010
Four-PLL Programmable Clock Generator for Portable Applications
Features
■ Device Operating Voltage Options:
MoBL Clock M4000 Family: 1.8 V
MoBL Clock M8000 Family: 2.5 V, 3.0 V, or 3.3 V
■ Selectable clock output voltages for both MoBL Clock M4000
and M8000:
1.5 V, 1.8 V, 2.5 V, 3.0 V, or 3.3 V
■ Fully integrated ultra low power phase-locked loops (PLLs)
■ Input reference clock frequency range:
External crystal: 8 to 48 MHz
External reference: 1 to 48 MHz clock
■ Output clock frequency range: 3–50 MHz
■ Up to eight I2C programmable output clocks
■ Programmable output drive strengths
■ 150 ps typical cycle-to-cycle jitter
■ Optional Spread Spectrum for EMI reduction
■ 24-pin (4 × 4 × 1 mm) QFN Package
■ Industrial temperature range
Benefits
■ Suitable for cell phone, portable, and consumer electronics
applications
■ Replaces multiple crystals or crystal oscillators enabling board
space saving
■ Multiple high-performance PLLs allow synthesis of unrelated
frequencies
■ Capable of Zero PPM frequency synthesis error
■ Application compatibility in multiple output voltage levels
■ Optional Spread Spectrum capable PLLs with Lexmark or
Linear profile for maximum EMI reduction
■ Programmable PLLs for system frequency margin tests
■ Meets critical timing requirements in complex system designs
■ Individually enable or disable each output using I2C
■ Ease of output clock selection using programmable crossbar
switches
Logic Block Diagram
OSC
I2C
PLL1
PLL2
PLL3
(SS)
Output
Dividers
and
Drive
Strength
Control
CLK1
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
XOUT
XIN/
EXCLKIN
SCL
SDA
Bank
1
Bank
2
Bank
3
PD #/ OE
PLL4
(SS)
Crossbar
Switch
SSON
MUX
and
Control
Logic
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