参数资料
型号: M906-02-150.0000LF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 150 MHz, OTHER CLOCK GENERATOR, CQCC36
封装: 9 X 9 MM, CERAMIC, LCC-36
文件页数: 1/8页
文件大小: 322K
代理商: M906-02-150.0000LF
M906-02 Datasheet Rev 0.7
Revised 30Jul2004
M906-02
VCSO BASED CLOCK GENERATOR
Prelimina r y Inf o r m ation
GENERAL DESCRIPTION
The M906-02 is a PLL (Phase Locked Loop) based
clock generator that uses an
internal VCSO (Voltage Controlled
SAW Oscillator) to produce a very
low jitter output clock. From the
M906-02-155.5200
, an output clock
frequency of 155.52 or 77.76MHz is
provided from six LVPECL clock
output pairs. (Other frequencies are available; consult
factory.) The accuracy of the output frequency is
assured by the internal PLL that phase-locks the
internal VCSO to the reference input frequency
(19.44MHz for the M906-02-155.5200). The input reference
can either be an external crystal, utilizing the internal
crystal oscillator, or a stable external clock source
such as a packaged crystal oscillator.
FEATURES
◆ Output clock frequency range 75MHz to 175MHz
(Consult factory for frequency availability)
◆ Selectable divider chooses one of two frequencies
◆ Six identical LVPECL output pairs (same frequency)
◆ Jitter 0.7ps rms (at 155.52MHz, over 12kHz-20MHz), typ.
◆ Ideal for OC-48/STM-16 clock reference
◆ Output-to-output skew < 100ps
◆ External XTAL or LVCMOS reference input
◆ Selectable external feed-through clock input
◆ STOP clock control (Logic 1 stops output clocks)
◆ Integrated SAW (surface acoustic wave) delay line
◆ Single 3.3V power supply
◆ Small 9 x 9 mm SMT (surface mount) package
PIN ASSIGNMENT (9 x 9 mm SMT)
Figure 1: Pin Assignment
SIMPLIFIED BLOCK DIAGRAM
Example Output Frequency Configurations
(M906-02-155.5200)
Ref Clock
Frequency
(MHz)
VCSO
Frequency
(MHz)
P Divider
Value
Output
Frequency
(MHz)
19.44
155.52
1
155.52
2
77.76
nOP
OP
_OUT
nO
P_
OP
M906-02-155.52 (Other Frequencies Available)
Divider
Select
External
Loop Filter
M906-02 VCSO Based Clock Generator
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