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参数资料
| 型号： | M928-02-700.0000 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 700 MHz, OTHER CLOCK GENERATOR, CQCC36 |
| 封装： | 9 X 9 MM, CERAMIC, LCC-36 |
| 文件页数： | 3/6页 |
| 文件大小： | 296K |
| 代理商： | M928-02-700.0000 |
M928-02 Datasheet Rev 0.4
3 of 6
Revised 30Jul2004
Integr ated Circuit Systems , Inc. ● Ne tw o r ki ng & C o mmun ica t io ns ● ww w. icst.com ● tel (508 ) 85 2-54 00
M928-02
VCSO BASED CLOCK GENERATOR
Preliminar y In f o r m atio n
FUNCTIONAL DESCRIPTION
The M928-02 is a PLL (Phase Locked Loop) based
clock generator that generates output clocks
synchronized to an input reference clock.
The M928-02 combines the flexibility of a VCSO
(Voltage Controlled SAW Oscillator) with the stability of
a crystal oscillator.
Input Reference
The 19.44MHz input reference can either be an external,
discrete crystal device or a stable external clock source
such as a packaged crystal oscillator:
If an external crystal is used with the on-chip crystal
oscillator circuit (XTAL OSC), the external crystal
should be a parallel-resonant, fundamental mode
crystal. Apply it to the XTAL_1 / REF_IN and XTAL_2 input
pins. External crystal load capacitors are also
required.
If an external LVCMOS/LVTTL clock source is used,
apply it to the XTAL_1 / REF_IN input pin.
In either case, the reference clock is supplied directly to
the phase detector of the PLL.
The PLL
The PLL (Phase Locked Loop) includes the phase
detector, the VCSO, and a feedback divider (labeled
“M Divider”).
The feedback divider is a digital circuit that divides the
VCSO output frequency by a numerical value “M” in
order to match the input reference frequency.
By controlling the frequency and phase of the VCSO,
the phase detector precisely locks the frequency and
phase of the feedback divider output to that of the input
reference. This creates an output frequency that is a
multiple of the reference frequency (which is output
from the VCSO).
The relationship between the VCSO output frequency,
the M Divider, and the input reference frequency is
defined as follows:
For the M928-02-622.0800 (see “Ordering Information” on pg. 6):
VCSO output frequency = 622.08MHz
M = 32
Input reference frequency = 19.44MHz
Therefore, for the M928-02-622.0800:
622.08
MHz = 32
19.44
MHz
The VCSO center output frequency of 622.08MHz
enables the product of
to fall within the lock range of the VCSO.
APPLICATION INFORMATION
This section includes information on the optional
external crystal and on the external loop filter.
External Crystal Specifications
If an external crystal is used with the on-chip crystal
oscillator circuit (XTAL OSC), the external crystal
should have the following general specifications:
The external crystal will be applied to the XTAL_1 / REF_IN
and XTAL_2 input pins. External crystal load capacitors
are also required.
Recommended External Crystal Configuration
XTAL Load Capacitance Specification = 18 pF
C1
= 27 pF
C2
= 33 pF
External load capacitors C1 and C2 present a load of 15 pf
to the crystal (they are seen in series by the crystal through
the common ground connection). With the additional of PCB
trace capacitance and M928-02 input capacitance, the total
load to the crystal is about 18 pf.
Fvcso
M
Fxtal
×
=
×
M
input crystal frequency
×
Crystal Specifications
Parameter
Min Typ Max Unit
Crystal Type
AT-cut quartz
Mode of Oscillation
Fundamental
f0
Frequency Range
16
40
MHz
ESR
Equivalent Series Resistance
50
Spurious Response (non-harmonic)
-40 dBc
C
L
Load Capacitance,
parallel load resonant
16
32
pF
P0
Drive Level
0.1
1.0
mW
Table 3: Crystal Specifications
XTAL_2
XTAL
XTAL OSC
M9xx-0x
XTAL_1 / REF_IN
C1
C2
M928-02
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