参数资料
型号: MACH211SP-15
厂商: Advanced Micro Devices, Inc.
英文描述: High-Density EE CMOS Programmable Logic
中文描述: 高密度电子工程CMOS可编程逻辑
文件页数: 31/37页
文件大小: 251K
代理商: MACH211SP-15
MACH211SP-7/10/12/15/20
31
POWER-UP RESET
The MACH devices have been designed with the capa-
bility to reset during system power-up. Following
power-up, all flip-flops will be reset to LOW. The output
state will depend on the logic polarity. This feature pro-
vides extra flexibility to the designer and is especially
valuable in simplifying state machine initialization. A
timing diagram and parameter table are shown below.
Due to the synchronous operation of the power-up
reset and the wide range of ways V
CC
can rise to its
steady state, two conditions are required to insure a
valid power-up reset. These conditions are:
1. The V
CC
rise must be monotonic.
2. Following reset, the clock input must not be driven
from LOW to HIGH until all applicable input and
feedback setup times are met.
Parameter Symbol
Parameter Descriptions
Max
Unit
t
PR
Power-Up Reset Time
10
μ
s
t
S
Input or Feedback Setup Time
See Switching Characteristics
t
WL
Clock Width LOW
20405B-23
Power-Up Reset Waveform
t
PR
t
WL
t
S
4 V
V
CC
Power
Registered
Output
Clock
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