MAS 3504D
Micronas
25
4.2.1. Pin Descriptions
4.2.1.1. Power Supply Pins
Connection of all power supply pins is mandatory for
the function of the MAS 3504D.
VDD
VSS
SUPPLY
SUPPLY
The VDD/VSS pair is internally connected with all digi-
tal modules of the MAS 3504D.
XVDD
XVSS
SUPPLY
SUPPLY
The XVDD/XVSS pins are internally connected with
the pin output buffers.
AVDD
AVSS
SUPPLY
SUPPLY
The AVDD/AVSS pair is connected internally with the
analog blocks of the MAS 3504D, i.e. clock synthe-
sizer and supply voltage supervision circuits.
4.2.1.2. DC/DC Converter Pins
DCEN
IN
The DCEN input signal enables the DC/DC converter
operation.
DCSG
SUPPLY
The
‘
DC converter Signal Ground
’
pin is used as a
basepoint for the internal switching transistor of the
DC/DC converter. It must always be connected to
ground.
DCSO
OUT
DCSO is an open drain output and should be con-
nected with external circuitry (inductor/diode) to start
the DC/DC converter. When the DC/DC converter is
not used, it has to be connected to VSS.
VSENS
IN
The VSENS pin is the input for the DC/DC converter
feedback loop. It must be connected directly with the
Schottky diode and the capacitor as shown in Fig. 2
–
1
on page 7.
When the DC/DC converter is not used, it has to be
connected to VDD.
4.2.1.3. Control Lines
I2CC
I2CD
SCL
SDA
IN/OUT
IN/OUT
Standard I
2
C control lines. Normally there are Pull-up-
resistors tied from each line to VDD.
4.2.1.4. Parallel Interface Lines
4.2.1.4.1. PIO Handshake Lines
’
PIO handshake lines
’
are used in operation mode.
PIO-DMA mode is used in input mode and
μ
P mode in
output mode.
PCS
IN
The
’
PIO chip select
’
is
driven from microcontroller to
activate data output from MAS 3504D to the bus. Data
is output to the bus on the falling edge of PCS and is
removed on the rising edge of PCS.
PR
IN
The
’
PIO request
’
must be set to
‘
1
’
to validate data
output from MAS 3504D.
RTR
OUT
‘
Ready to read
’
is driven from the MAS 3504D in PIO/
DMA input mode.
RTW
OUT
‘
Ready to write
’
is driven from MAS 3504D to indicate
that data is available in PIO output mode.
EOD
OUT
‘
End of DMA
’
is supported by the built-in firmware in
PIO-DMA input mode.
4.2.1.4.2. PIO Data Lines
PI19...PI12
PARALLEL DATA
OUT/IN
These pins are used to send or receive compressed
data.