参数资料
型号: MAX1066BEUP+T
厂商: Maxim Integrated Products
文件页数: 2/14页
文件大小: 0K
描述: IC ADC 14BIT 165KSPS 20TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 14
采样率(每秒): 165k
数据接口: 并联
转换器数目: 1
功率耗散(最大): 16mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
输入数目和类型: 1 个单端,单极
MAX1065/MAX1066
Standby Mode
While in standby mode, the supply current is reduced
to less than 1mA (typ). The next falling edge of CS with
R/C low causes the MAX1065/MAX1066 to exit standby
mode and begin acquisition. The reference and refer-
ence buffer remain active to allow quick turn-on time.
Standby mode allows significant power savings while
running at the maximum sample rate.
Shutdown Mode
In shutdown mode, the reference and reference buffer
are shut down between conversions. Shutdown mode
reduces supply current to 0.5A (typ) immediately after
the conversion. The falling edge of CS with R/C low
causes the reference and buffer to wake up and enter
acquisition mode. To achieve 14-bit accuracy, allow
10ms (CREFADJ = 0.1F, CREF = 1F) for the internal
reference to wake up. Increase wakeup time propor-
tionally when using larger values of CREFADJ and CREF.
Internal and External Reference
Internal Reference
The internal reference of the MAX1065/MAX1066 is
internally buffered to provide 4.096V (typ) output at
REF. Bypass REF to AGND and REFADJ to AGND with
1F and 0.1F respectively. Fine adjustments can be
made to the internal reference voltage by sinking or
sourcing current at REFADJ. The input impedance at
REFADJ is nominally 5kΩ. The internal reference volt-
age is adjustable to ±1.5% with the circuit of Figure 7.
External Reference
An external reference can be placed at either the input
(REFADJ) or the output (REF) of the MAX1065/
MAX1066’s internal buffer amplifier. When connecting
an external reference to REFADJ, the input impedance
is typically 5kΩ. Using the buffered REFADJ input
makes buffering the external reference unnecessary;
however, the internal buffer output must be bypassed
at REF with a 1F capacitor.
Connect REFADJ to AVDD to disable the internal buffer.
Directly drive REF using an external reference. During
conversion, the external reference must be able to
drive 100A of DC load current and have an output
impedance of 10Ω or less. REFADJ’s impedance is typ-
ically 5kΩ. The DC input impedance of REF is 40kΩ
minimum.
For optimal performance, buffer the reference through
an op amp and bypass REF with a 1F capacitor.
Consider the MAX1065/MAX1066’s equivalent input
noise (80VRMS) when choosing a reference.
Low-Power, 14-Bit Analog-to-Digital Converters
with Parallel Interface
10
______________________________________________________________________________________
AUTO-ZERO
RAIL
CAPACITIVE DAC
CDAC = 32pF
REF
AGND
TRACK
HOLD
TRACK
ZERO
RIN
800
Ω
AIN
CSWITCH
3pF
Figure 4. Equivalent Input Circuit
CS
R/C
EOC
REF
AND
BUFFER
REF POWER-
DOWN BIT
ACQUISITION
CONVERSION
DATA
OUT
Figure 5. Selecting Standby Mode
CS
EOC
REF
AND
BUFFER
REF POWER-
DOWN BIT
ACQUISITION
CONVERSION
DATA
OUT
R/C
Figure 6. Selecting Shutdown Mode
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