- 您现在的位置：买卖IC网 > PDF目录1935 > MAX11041ETC+T (Maxim Integrated Products)IC REMOTE CTRLR WIRED 12-TQFN PDF资料下载
参数资料
| 型号： | MAX11041ETC+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/17页 |
| 文件大小： | 0K |
| 描述： | IC REMOTE CTRLR WIRED 12-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | PDA，便携式音频/视频，智能电话 |
| 接口： | I²C |
| 电源电压： | 1.6 V ~ 3.6 V |
| 封装/外壳： | 12-WQFN 裸露焊盘 |
| 供应商设备封装： | 12-TQFN-EP（4x4） |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
MAX11041
Bit Transfer
One data bit is transferred during each SCL clock cycle.
The data on SDA must remain stable during the high
period of the SCL clock pulse. Changes in SDA while
SCL is high and stable are considered control signals
(see the
START and STOP Conditions section). Both
SDA and SCL remain high when the bus is not active.
START and STOP Conditions
The master initiates a transmission with a START condi-
tion, a high-to-low transition on SDA while SCL is high.
The master terminates a transmission with a STOP con-
dition, a low-to-high transition on SDA while SCL is high
(see Figure 7).
Acknowledge Bits
Data transfers are acknowledged with an acknowledge
bit (ACK) or a not-acknowledge bit (NACK). Both the
master and the MAX11041 generates ACK bits. To gen-
erate an ACK, pull SDA low before the rising edge of
the ninth clock pulse and keep it low during the high
period of the ninth clock pulse (see Figure 8). To gener-
ate a NACK, leave SDA high before the rising edge of
the ninth clock pulse and keep it high for the duration of
the ninth clock pulse. Monitoring NACK bits allows for
detection of unsuccessful data transfers. The master
can also use NACK bits to interrupt the current data
transfer to start another data transfer. If the master uses
NACK during a read from the FIFO, the FIFO word
pointer is not incremented and the next FIFO read pro-
duces the same FIFO word. Thus, the master must pro-
vide the ACK bit to advance the FIFO word pointer.
Applications Information
Required Resistor Set
Table 4 shows the required resistor set for 30 key imple-
mentations. Resistors must have a 1% tolerance.
Jack Insertion/Removal Detection
During jack insertion there may be several
false key entries written to the FIFO. When a jack inser-
tion/removal is detected, it is necessary to read the
FIFO repeatedly until the final change in jack state is
located (see Figure 9).
Extended Keypresses
In certain applications, a key triggers different events
depending on the duration of the keypress, simultane-
ous keypresses, or a specific order of keypresses.
Long Keypress Detection
In some applications, the duration of the keypress
determines the event triggered. For example, TALK
dials the entered phone number normally and initiates
voice dialing if it is held down. A second common use
of holding a key down is to generate a continuous
stream of events, such as the volume control or
fast forward.
Wired Remote Controller
12
______________________________________________________________________________________
Figure 9. Jack Insertion Detection
KEY TYPE
JACK
REMOVED
JACK
DETECTED
FALSE
KEYS
TIME
VINT
1. JACK INSERTION DETECTED AND ENTERED IN FIFO.
2. JACK REMOVAL DETECTED AND ENTERED IN FIFO.
3. JACK INSERTION DETECTED AND ENTERED IN FIFO.
4. FIFO IS READ UNTIL EMPTY (
INT GOES HIGH).
THE LAST READ BEFORE THE EMPTY FIFO IS REACHED
IS THE FINAL STATE OF THE JACK DETECTION.
相关PDF资料 |
PDF描述 |
|---|---|
| MAX11043ATL+T | IC ADC 16BIT W/DAC 40-TQFN-EP |
| MAX11359AETL+T | IC DAS SYSTEM 16BIT 40-TQFN |
| MAX115CAX+ | IC DAS SYSTEM 12BIT 36-SSOP |
| MAX1221BETX+T | IC ADC/DAC 12BIT W/FIFO 36TQFNEP |
| MAX1257BETM+T | IC ADC/DAC 12BIT 48-TQFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX11041有线遥控器 | 制造商:未知厂家 制造商全称:未知厂家 功能描述: |
| MAX11042 | 功能描述:接口 - 专用 RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| MAX11042ETC+ | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Wired Remote Controllers |
| MAX11043 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:4-Channel, 16-Bit, Simultaneous-Sampling ADCs with PGA, Filter, and 8-/12-Bit Dual-Stage DAC |
| MAX11043ATL+ | 功能描述:模数转换器 - ADC 16Bit 4Ch Simul-Samp w/PGA & 8/12Bit D-S RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
发布紧急采购，3分钟左右您将得到回复。