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参数资料
| 型号： | MAX11101EWC+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 5/19页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT SRL 200KSPS 12WLP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 位数： | 14 |
| 采样率（每秒）： | 200k |
| 数据接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 1.3W |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-WFBGA，WLCSP |
| 供应商设备封装： | 12-WLP |
| 包装： | 标准包装 |
| 输入数目和类型： | 1 个单端，单极 |
| 其它名称： | MAX11101EWC+TDKR |
Maxim Integrated Products 13
MAX11101
14-Bit, +5V, 200ksps ADC with 10A Shutdown
Figure 9. Change Multiplexer Input Near Beginning of Conversion to Allow Time for Slewing and Settling
Serial Interfaces
The MAX11101’s interface is fully compatible with SPI,
QSPI, and MICROWIRE standard serial interfaces.
If a serial interface is available, establish the CPU’s
serial interface as master, so that the CPU generates the
serial clock for the MAX11101. Select a clock frequency
between 100kHz and 4.8MHz:
1) Use a general-purpose I/O line on the CPU to pull CS
low.
2) Activate SCLK for a minimum of 24 clock cycles. The
serial data stream of eight leading zeros followed by
the MSB of the conversion result begins at the fall-
ing edge of CS. DOUT transitions on SCLK’s falling
edge and the output is available in MSB-first format.
Observe the SCLK to DOUT valid timing characteris-
tic. Clock data into the FP on SCLK’s rising edge.
3) Pull CS high at or after the 24th falling clock edge. If
CS remains low, trailing zeros are clocked out after
the 2 sub-bits, S1 and S0.
4) With CS high, wait at least 50ns (tCSW) before starting a
new conversion by pulling CS low. A conversion can be
aborted by pulling CS high before the conversion ends.
Wait at least 50ns before starting a new conversion.
Data can be output in three 8-bit sequences or continu-
ously. The bytes contain the results of the conversion pad-
ded with eight leading zeros before the MSB. If the serial
clock has not been idled after the sub-bits (S1 and S0) and
CS has been kept low, DOUT sends trailing zeros.
A0
A1
CLK
CHANGE MUX INPUT HERE
CONVERSION
IN1
A0
A1
IN2
IN3
IN4
OUT
ACQUISITION
4-TO-1
MUX
AIN
CS
MAX11101
CS
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX11102 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs |
| MAX11102_11 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs 2.2V to 3.6V Supply Voltage |
| MAX11102_1108 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs |
| MAX11102ATB | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs 2.2V to 3.6V Supply Voltage |
| MAX11102ATB+ | 制造商:Maxim Integrated Products 功能描述: 制造商:Maxim Integrated Products 功能描述:SMALL, 2.2V TO 3.6V, LOW-POWER, 1-/2-CHANNEL, SERIAL, 8-/10- - Rail/Tube |
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