参数资料
型号: MAX111ACAP+T
厂商: Maxim Integrated Products
文件页数: 5/24页
文件大小: 0K
描述: IC ADC 14BIT 2CH 5V 20-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
位数: 14
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 640mW
电压电源: 单电源
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 带卷 (TR)
输入数目和类型: 4 个单端,单极;2 个差分,单极
MAX110/MAX111
Low-Cost, 2-Channel, ±14-Bit Serial ADCs
______________________________________________________________________________________
13
CS
SCLK
tCSH
tCSS
tCK
tDH
MSB
LSB
tDS
DIN
DOUT
BUSY
tDH
tCK
tDO
tDA
POL
OFL
MSB
DO
END OF
CONVERSION
START OF
CONVERSION
Figure 6. Detailed Serial-Interface Timing
The ADC serial interface operates with just SCLK, DIN,
and DOUT (allow sufficient time for the conversion to
complete between read/write operations). Achieve con-
tinuous operation by connecting BUSY to an uncommit-
ted P I/O or interrupt, to signal the processor when the
conversion results are ready. Figures 8a and 8b show
the timing for SPI/MICROWIRE and QSPI operation.
The fully static 16-bit I/O register allows infinite time
between the two 8-bit read/write operations necessary
to obtain the full 16 bits of data with SPI and
MICROWIRE. CS must remain low during the entire
two-byte transfer (Figure 8a). QSPI allows a full 16-bit
data transfer (Figure 8b).
Interfacing to the 80C32 Microcontroller Family
Figure 7c shows the general 80C32 connection to the
MAX110/MAX111 using Port 1. For a more detailed dis-
cussion, see the MAX110 evaluation kit manual.
I/O Shift Register
Serial data transfer is accomplished with a 16-bit fully
static shift register. The 16-bit control word shifted into
this register during a data-transfer operation controls
the ADC’s various functions. The MSB (NO-OP)
enables/disables transfer of the control word within the
ADC. A logic 1 causes the remaining 15 bits in the con-
trol word to be transferred from the I/O register into the
control register when CS goes high, updating the
ADC’s configuration and starting a new conversion. If
I/O
SCK
MISO
MOSI
MASKABLE
INTERRUPT
SS
a. SPI/QSPI
+5V
P
CS
SCLK
DOUT
DIN
BUSY
MAX110
MAX111
I/O
SK
SI
SO
MASKABLE
INTERRUPT or I/O
b. MICROWIRE
P
CS
SCLK
DOUT
DIN
BUSY
P1.0
P1.1
P1.2
P1.3
P1.4
c. 80C51/80C32
P
CS
SCLK
DIN
DOUT
BUSY
MAX110
MAX111
MAX110
MAX111
Figure 7. Common Serial-Interface Connections
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