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参数资料
| 型号： | MAX11212AEUB+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 2/14页 |
| 文件大小： | 0K |
| 描述： | IC ADC 18BIT SRL 120SPS 10UMAX |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 位数： | 18 |
| 采样率（每秒）： | 120 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 444mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-µMAX |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，双极 |
10
Maxim Integrated
18-Bit, Single-Channel, Ultra-Low Power, Delta-
Sigma ADC with 2-Wire Serial Interface
MAX11212
Data Read Following Every Conversion
The MAX11212 indicates conversion data availabil-
ity as well as allows the retrieval of data through the
RDY/DOUT output. The RDY/DOUT output idles at the
value of the last bit read unless a 25th SCLK pulse is
provided, causing RDY/DOUT to idle high. RDY/DOUT is
pulled low when the conversion data is available.
Figure 1 shows the timing diagram for the data read.
Once a low is detected on RDY/DOUT, clock pulses at
SCLK clock out the data. Data is shifted out MSB first
and is in binary two’s complement format. Once all the
data has been shifted out, a 25th SCLK is required to
pull the RDY/DOUT output back to the idle high state.
See Figure 2.
If the data is not read before the next conversion data is
updated, the old data is lost, as the new data overwrites
the old value.
Data Read Followed by Self-Calibration
To initiate self-calibration at the end of a data read,
provide a 26th SCLK pulse. After reading the 16 bits of
conversion data, a 25th positive edge on SCLK pulls
the RDY/DOUT output back high, indicating end of data
read. Provide a 26th SCLK pulse to initiate a self-calibra-
tion routine starting on the falling edge of the 26th SCLK.
A subsequent falling edge of RDY/DOUT indicates data
availability at the end of calibration. The timing is illus-
trated in Figure 3.
Figure 1. Timing Diagram for Data Read After Conversion
Figure 2. Timing Diagram for Data Read Followed by RDY/DOUT Being Asserted High Using 25th SCLK
t5
t3
1
D17
CONVERSION IS DONE
DATA IS AVAILABLE
CONVERSION IS DONE
DATA IS AVAILABLE
D16
0
23
24
t1
t4
t7
t2
t6
SCLK
RDY/DOUT
1
D17
CONVERSION IS DONE
DATA IS AVAILABLE
CONVERSION IS DONE
DATA IS AVAILABLE
D16
0
23
24
25
SCLK
RDY/DOUT
25TH SLK RISING EDGE
PULLS RDY/DOUT
HIGH
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX11212B | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:18-Bit, Single-Channel, Ultra-Low Power, Delta-Sigma ADC with 2-Wire Serial Interface |
| MAX11212BEUB | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:18-Bit, Single-Channel, Ultra-Low Power, Delta-Sigma ADC with 2-Wire Serial Interface |
| MAX11212BEUB+ | 功能描述:模数转换器 - ADC 18-Bit Delta-Sigma RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX11212BEUB+T | 功能描述:模数转换器 - ADC 18-Bit Delta-Sigma RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX11213 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:16-Bit, Single-Channel, Ultra-Low-Power, Delta-Sigma ADCs with Programmable Gain and GPIO |
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