M
8-Bit, 300Msps Flash ADC
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5
21
1, 4, 17, 25, 26, 38, 39
Negative Analog Supply (nominally -5.2V)
ECL Clock Input Pin
2, 19, 22, 24, 27, 28, 36,
37, 40, 42
No Connect. Not internally connected.
20
PIN
6, 15
Digital Ground
Inverse ECL Clock Input Pin
7
Digital Data Output (LSB)
—
—
Overrange Output
Reference Voltage Bottom, Sense
30, 34
14
Digital Data Output (MSB)
Analog Input. Can be connected to the input
signal or used as a sense.
8–13
Digital Data Output
32
Reference Voltage Tap 2 (typically -1V)
—
Reference Voltage Top, Sense
41
Reference Voltage Top, Force
—
—
Data-Ready Output
Data-Ready Inverse
CLK
V
EE
N.C.
CLK
DGND
D0
VRBS
D8
VIN
D7
D1–D6
VR2
VRTS
VRTF
DRINV
DREADY
6
3, 7, 12, 22, 27, 32
28, 30
5
1, 34
36
10
44
15, 19
43
37–42
17
24
23
29
35
3
D0–D6 Output Inversion Control
LINV
31
5, 16, 29, 31, 33, 35
Analog Ground
AGND
2, 8, 9, 14, 16, 18, 20,
25, 26, 33
23
Reference Voltage Bottom, Force
VRBF
11
—
Reference Voltage Tap 1 (typically -1.5V)
VR1
13
—
Reference Voltage Tap 3 (typically -0.5V)
VR3
21
______________________________________________________________Pin Desc ription
FUNCTION
Ceramic SB
NAME
CERQUAD
The MAX1125 is a 300Msps, monolithic, 8-bit parallel
flash analog-to-digital converter (ADC) with an analog
bandwidth of over 200MHz. A major advance over pre-
vious flash converters is the inclusion of 256 input pre-
amplifiers between the reference ladder and input
comparators. (See Functional Diagram) This feature
not only reduces clock-transient kickback to the input
and reference ladder due to a low AC beta, but also
reduces the effect of the dynamic state of the input sig-
nal on the latching characteristics of the input compara-
tors. The preamplifiers act as buffers and stabilize the
input capacitance so it remains constant for varying
input voltages and frequencies, making the part easier
to drive than previous flash converters. The MAX1125
incorporates a special decoding scheme that reduces
metastable errors (sparkle codes or flyers) to a maxi-
mum of 1LSB.
_______________Detailed Desc ription
18
D7 Output Inversion Control
MINV
4