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参数资料
| 型号： | MAX1135BEAP |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | ADC |
| 英文描述： | 16-Bit ADCs, 150ksps, 3.3V Single Supply |
| 中文描述： | 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封装： | 5.30 MM, 0.65 MM PITCH, SSOP-20 |
| 文件页数： | 11/18页 |
| 文件大小： | 353K |
| 代理商： | MAX1135BEAP |
M
16-Bit ADCs, 150ksps, 3.3V Single Supply
______________________________________________________________________________________
11
SCLK
DOUT
DIN
SSTRB
CS
4
1
8
START
M1
M0
P2
P1
P0
UNI/
BIP
INT/
EXT
9
21
24
B4
B14
B15
MSB
B3
B1
B0
LSB
B2
FILLED WITH
ZEROS
t
ACQ
t
CONV
10
B13
Figure 5. Internal Clock Mode Timing, Short Acquisition
In long acquisition mode, when using external clock,
SSTRB pulses high for one clock period after the 15th
falling edge of SCLK following the start bit. The MSB of
the conversion is available at DOUT on the 16th falling
edge of SCLK (Figure 3).
In external clock mode, SSTRB is high impedance when
CS
is high (Figure 4).
CS
is normally held low during the
entire conversion. If
CS
goes high during the conver-
sion, SCLK is ignored until
CS
goes low. This allows
external clock mode to be used with 8-bit bytes.
Internal Clock
In internal clock mode, the MAX1134/MAX1135 gener-
ate their own conversion clock. This frees the micro-
processor from the burden of running the SAR
conversion clock, and allows the conversion results to
be read back at the processor
’
s convenience, at any
clock rate up to 4MHz.
SSTRB goes low at the start of the conversion and goes
high when the conversion is complete. SSTRB is low for
a maximum of 7μs, during which time SCLK should
remain low for best noise performance. An internal reg-
ister stores data when the conversion is in progress.
SCLK clocks the data out of the internal storage regis-
ter at any time after the conversion is complete.
The MSB of the conversion is available at DOUT when
SSTRB goes high. The subsequent 15 falling edges on
SCLK shift the remaining bits out of the internal storage
register (Figure 5).
CS
does not need to be held low
once a conversion is started.
When internal clock mode is selected, SSTRB does not
go into a high-impedance state when
CS
goes high.
Figure 6 shows the SSTRB timing in internal clock
mode. In internal clock mode, data can be shifted into
the MAX1134/MAX1135 at clock rates up to 4MHz, pro-
P0 CLOCKED IN
t
SSTRB
t
CONV
t
SCK
t
CSS
SSTRB
SCLK
NOTE
:
FOR BEST NOISE PERFORMANCE, KEEP SCLK LOW DURING CONVERSION.
t
CSH
CS
Figure 6. Internal Clock Mode SSTRB Detailed Timing
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1135BEAP+ | 功能描述:模数转换器 - ADC 16-Bit 150ksps 3.3V Single Supply RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1135BEAP+T | 功能描述:模数转换器 - ADC 16-Bit 150ksps 3.3V Single Supply RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1135BEAP-T | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1136 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel, 2-Wire Serial 10-Bit ADCs |
| MAX1136_09 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel, 2-Wire Serial 10-Bit ADCs |
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