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参数资料
| 型号： | MAX1147BEUP+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/25页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 116KSPS 20-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 74 |
| 位数： | 14 |
| 采样率（每秒）： | 116k |
| 数据接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 879mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 管件 |
| 输入数目和类型： | 4 个单端，单极；4 个单端，双极；2 个差分，单极；2 个差分，双极 |
| 产品目录页面： | 1395 (CN2011-ZH PDF) |
MAX1146–MAX1149
Multichannel, True-Differential,
Serial, 14-Bit ADCs
______________________________________________________________________________________
17
Applications Information
Idle Mode
The device is considered idle when all the bits have been
clocked out or 18 zeros have been clocked in on DIN.
Start Bit
The falling edge of CS alone does not start a conver-
sion. The first logic high clocked into DIN with CS low is
interpreted as a start bit and defines the first bit of the
control byte. The device begins to track on the fifth
falling edge of SCLK after a start bit has been recog-
nized. A conversion starts on the eighth falling edge of
SCLK as the last bit of the control byte is being clocked
in. The start bit is defined as follows:
1) The first high bit clocked into DIN with CS low any
time the converter is idle.
or
2) The first high bit clocked into DIN after bit 5 of a
conversion in progress is clocked onto DOUT
(Figures 10 and 11).
Toggling CS before the current conversion is complete
aborts the conversion and clears the output register.
The fastest the MAX1146–MAX1149 can run with CS held
low between conversions is 18 clocks per conversion.
Figures 10 and 11 show the serial-interface timing neces-
sary to perform a conversion every 18 SCLK cycles.
SCLK
SSTRB
DIN
START SEL2
SEL1
SEL0
PD1
PD0
18
9
16
24
INPUT MUX
INPUT T/H
SET ACCORDING TO PREVIOUS CONTROL BYTE
SET TO CB1
TRACK
HOLD
HIGH-Z
DOUT
tACQ
HIGH-Z
tCONV
CB1
OPEN
RESET TO CB1
D13
D12
D11
D10
D9
D8
D6
D5
D4
D3
D2
D1
D0
D7
CS
SGL/DIF UNI/BIP
Figure 9. Internal Clock Mode Timing—24 Clocks/Conversion Timing
SCLK
SSTRB
DIN
START SEL2
SEL1 SEL0
PD1
PD0
18
INPUT MUX
INPUT T/H
SET ACCORDING TO PREVIOUS
CONTROL BYTE
TRACK
HOLD
DOUT
HIGH-Z
14
TRACK
10
18
11
HOLD
14
D13 D12
10
D5
D4
11
SET TO CB2
SET TO CB1
START SEL2
SEL1 SEL0
PD1
PD0
D13 D12
D5
D4
D3
D2
D1
D0
D3
D2
D1
D0
START SEL2
SEL1 SEL0
15
HOLD
CS
CB1
CB2
tACQ
tCONV
tACQ
SGL/DIF UNI/BIP
UNI/BIP
SGL/DIF
UNI/BIP
SGL/DIF
Figure 10. External Clock Mode—18 Clocks/Conversion Timing
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1147BEUP+ | 功能描述:模数转换器 - ADC 14-Bit 4Ch 116ksps 3.3V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1147BEUP+T | 功能描述:模数转换器 - ADC 14-Bit 4Ch 116ksps 3.3V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1147BEUP-T | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1148 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Multichannel, True-Differential, Serial, 14-Bit ADCs |
| MAX1148BCUP | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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