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| 型号： | MAX1159BEUI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 2/15页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 135KSPS 28-TSSOP |
| 标准包装： | 2,500 |
| 位数： | 14 |
| 采样率（每秒）： | 135k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 1.03W |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个单端，双极 |
MAX1157/MAX1159/MAX1175
Shutdown Mode
In shutdown mode, the reference and reference buffer
shut down between conversions. Shutdown mode
reduces supply current to 0.5A (typ) immediately after
the conversion. The next falling edge of CS with R/C
low causes the reference and buffer to wake up and
enter acquisition mode. To achieve 14-bit accuracy,
allow 12ms (CREFADJ = 0.1F, CREF = 10F) for the
internal reference to wake up.
Internal and External Reference
Internal Reference
The internal reference of the MAX1157/MAX1159/
MAX1175 is internally buffered to provide +4.096V out-
put at REF. Bypass REF to AGND and REFADJ to
AGND with 10F and 0.1F, respectively.
Sink or source current at REFADJ to make fine adjust-
ments to the internal reference. The input impedance of
REFADJ is nominally 5k
. Use the circuit of Figure 7 to
adjust the internal reference to ±1.5%.
External Reference
An external reference can be placed at either the input
(REFADJ) or the output (REF) of the MAX1157/
MAX1159/MAX1175’s internal buffer amplifier. Using
the buffered REFADJ input makes buffering the external
reference unnecessary. The input impedance of
REFADJ is typically 5k
. The internal buffer output
must be bypassed at REF with a 10F capacitor.
Connect REFADJ to AVDD to disable the internal buffer.
Directly drive REF using an external 3.8V to 4.2V refer-
ence. During conversion, the external reference must
be able to drive 100A of DC load current and have an
output impedance of 10
or less.
For optimal performance, buffer the reference through
an op amp and bypass REF with a 10F capacitor.
Consider the MAX1157/MAX1159/MAX1175’s equivalent
input noise (0.6LSB) when choosing a reference.
Reading the Conversion Result
EOC flags the microprocessor when a conversion is
complete. The falling edge of EOC signals that the data
is valid and ready to be output to the bus. D0–D13 are
the parallel outputs of the MAX1157/MAX1159/
MAX1175. These three-state outputs allow for direct
connection to a microcontroller I/O bus. The outputs
remain high-impedance during acquisition and conver-
sion. Data is loaded onto the bus with the third falling
edge of CS with R/C high (after tDO). Bringing CS high
forces the output bus back to high impedance. The
MAX1157/MAX1159/MAX1175 then wait for the next
falling edge of CS to start the next conversion cycle
(see Figure 2).
14-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
10
______________________________________________________________________________________
Figure 6. Selecting Shutdown Mode
CS
R/C
EOC
REF AND
BUFFER
POWER
ACQUISITION
CONVERSION
DATA
OUT
Figure 7. MAX1157/MAX1159/MAX1175 Reference Adjust
Circuit
MAX1157
MAX1159
MAX1175
REFADJ
+5V
68k
100k
150k
0.1
F
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相关代理商/技术参数 |
参数描述 |
|---|---|
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