参数资料
型号: MAX11606EUA+
厂商: Maxim Integrated Products
文件页数: 5/22页
文件大小: 0K
描述: IC ADC I2C/SRL 10BIT 4CH 8UMAX
产品培训模块: MAX116xx
Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
位数: 10
采样率(每秒): 94.4k
数据接口: I²C,串行
转换器数目: 1
功率耗散(最大): 470.6mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-uMAX
包装: 管件
输入数目和类型: 4 个单端,单极;4 个单端,双极;2 个差分,单极;2 个差分,双极
产品目录页面: 1398 (CN2011-ZH PDF)
MAX11606–MAX11611
Low-Power, 4-/8-/12-Channel, I2C,
10-Bit ADCs in Ultra-Small Packages
13
Maxim Integrated
Configuration/Setup Bytes (Write Cycle)
A write cycle begins with the bus master issuing a
START condition followed by seven address bits (Figure
7) and a write bit (R/W = 0). If the address byte is suc-
cessfully received, the MAX11606–MAX11611 (slave)
issues an acknowledge. The master then writes to the
slave. The slave recognizes the received byte as the
setup byte (Table 1) if the most significant bit (MSB) is
1. If the MSB is 0, the slave recognizes that byte as the
configuration byte (Table 2). The master can write either
one or two bytes to the slave in any order (setup byte
then configuration byte; configuration byte then setup
byte; setup byte or configuration byte only; Figure 9). If
the slave receives a byte successfully, it issues an
acknowledge. The master ends the write cycle by issu-
ing a STOP condition or a repeated START condition.
When operating in HS mode, a STOP condition returns
the bus into F/S mode (see the
HS Mode section).
B. TWO-BYTE WRITE CYCLE
SLAVE TO MASTER
MASTER TO SLAVE
S
1
SLAVE ADDRESS
A
71 1
W
SETUP OR
CONFIGURATION BYTE
SETUP OR
CONFIGURATION BYTE
8
P or Sr
1
A
1
MSB DETERMINES WHETHER
SETUP OR CONFIGURATION BYTE
S
1
SLAVE ADDRESS
A
71 1
W
SETUP OR
CONFIGURATION BYTE
8
P or Sr
1
A
1
MSB DETERMINES WHETHER
SETUP OR CONFIGURATION BYTE
A
1
8
A. ONE-BYTE WRITE CYCLE
NUMBER OF BITS
Figure 9. Write Cycle
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
REG
SEL2
SEL1
SEL0
CLK
BIP/UNI
RST
X
BIT
NAME
DESCRIPTION
7
REG
Register bit. 1 = setup byte, 0 = configuration byte (see Table 2).
6
SEL2
5
SEL1
4
SEL0
Three bits select the reference voltage and the state of AIN_/REF
(MAX11606/MAX11607/MAX11610/MAX11611) or REF (MAX11608/MAX11609) (Table 6).
Defaulted to 000 at power-up.
3
CLK
1 = external clock, 0 = internal clock. Defaulted to 0 at power-up.
2
BIP/UNI
1 = bipolar, 0 = unipolar. Defaulted to 0 at power-up (see the Unipolar/Bipolar section).
1
RST
1 = no action, 0 = resets the configuration register to default. Setup register remains unchanged.
0
X
Don’t-care bit. This bit can be set to 1 or 0.
Table 1. Setup Byte Format
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