参数资料
型号: MAX1168BCEG+
厂商: Maxim Integrated Products
文件页数: 8/30页
文件大小: 0K
描述: IC ADC 16BIT 200KSPS 24-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
位数: 16
采样率(每秒): 200k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 762mW
电压电源: 模拟和数字
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 管件
输入数目和类型: 8 个单端,单极
MAX1167/MAX1168
Power-Down Modes
Table 5 shows the MAX1167/MAX1168 power-down
modes. Three internal reference modes and one exter-
nal reference mode are available. Select power-down
modes by writing to bits 2 and 1 in the command/con-
figuration/control register. The MAX1167/MAX1168
enter the selected power-down mode on the rising
edge of CS.
The internal reference stays on when CS is pulled high,
if bits 2 and 1 are set to zero. This mode allows for the
fastest turn-on time.
Setting bit 2 = 0 and bit 1 = 1 turns both the reference
and reference buffer off when CS is brought high. This
mode achieves the lowest supply current. The refer-
ence and buffer wake up on the falling edge of CS
when in SPI/QSPI/MICROWIRE mode and on the falling
edge of DSPR when in DSP mode. Allow 5ms for the
internal reference to rise and settle when powering up
from a complete shutdown (VREF = 0, CREF = 1F).
The internal reference stays on and the buffer is shut off
on the rising edge of CS when bit 2 = 1 and bit 1 = 0.
The MAX1167/MAX1168 enter this mode on the rising
edge of CS. The buffer wakes up on the falling edge of
CS when in SPI/QSPI/MICROWIRE mode and on the ris-
ing edge of DSPR when in DSP mode. Allow 5ms for
VREF to settle when powering up from a complete shut-
down (VREF = 0, CREF = 1F). VREFCAP is always equal
to +4.096V in this mode.
Set both bit 2 and bit 1 to 1 to turn off the reference and
reference buffer to allow connection of an external ref-
erence. Using an external reference requires no extra
wake-up time.
Operating Modes
External Clock 8-Bit-Wide Data-Transfer Mode
(MAX1167 and MAX1168)
Force DSPR high and DSEL low (MAX1168) for SPI/
QSPI/MICROWIRE interface mode. The falling edge of
CS wakes the analog circuitry and allows SCLK to clock
in data. Ensure the duty cycle on SCLK is between 45%
and 55% when operating at 4.8MHz (the maximum
clock frequency). For lower clock frequencies, ensure
the minimum high and low times are at least 93ns.
External-clock-mode conversions with
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
16
______________________________________________________________________________________
CS
SCLK
DIN
DOUT
tCSW
tCSS
tCL
tDS
tDH
tDV
tCH
tDO
tTR
tCSH
tCP
Figure 8. Detailed SPI Interface Timing
COMPLETE CONVERSION SEQUENCE
CONVERSION 0
CONVERSION 1
POWERED UP
POWERED UP POWERED DOWN
DOUT
CS
Figure 9. Shutdown Sequence
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相关代理商/技术参数
参数描述
MAX1168BCEG+ 功能描述:模数转换器 - ADC 16-Bit 8Ch 200ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1168BCEG+T 功能描述:模数转换器 - ADC 16-Bit 8Ch 200ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1168BCEG-T 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1168BEEG 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1168BEEG+ 功能描述:模数转换器 - ADC 16-Bit 8Ch 200ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32