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参数资料
| 型号： | MAX116EVKIT |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 11/14页 |
| 文件大小： | 0K |
| 描述： | EVAL KIT FOR MAX116 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 116k |
| 数据接口： | 并联 |
| 输入范围： | ±2.5 V |
| 在以下条件下的电源（标准）： | 17mW @ 116kSPS |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | MAX116 |
| 已供物品： | 板，CD |
_______________Detailed Description
The MAX115/MAX116 use a successive-approximation
conversion technique and four simultaneous-sampling
track/hold (T/H) amplifiers to convert analog signals into
12-bit digital outputs. Each T/H has two multiplexed
inputs, allowing a total of eight inputs. Each T/H output
is converted and stored in memory to be accessed
sequentially by the parallel interface with successive
read cycles. The MAX115/MAX116 internal micro-
sequencer can be programmed to digitize one, two,
three, or four inputs sampled simultaneously from either
of the two banks of four inputs (Figure 2). The
MAX115/MAX116 can operate with either an external or
internal clock. For internal operation, connect CLK to
DVDD.
MAX115/MAX116
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
6
_______________________________________________________________________________________
______________________________________________________________Pin Description
Figure 1. Load Circuit for Access Time and Bus Relinquish Time
TO OUTPUT
PIN
120pF
1.0mA
1.6mA
1.6V
Channel 3 Multiplexed Inputs (single-ended)
CH3A, CH3B
34, 35
Channel 4 Multiplexed Inputs (single-ended)
CH4A, CH4B
32, 33
Analog Supply Voltage
AVSS
31
Interrupt output. Falling edge indicates the end of a conversion sequence.
INT
30
Conversion-Start input. Rising edge initiates sampling and conversion sequence.
CONVST
29
Read Input (active-low)
RD
28
Write Input (active-low)
WR
27
Digital Ground
DGND
18
Data Bits
D3, D2
19, 20
Bidirectional Data Bits/Address Bits
D1/A3, D0/A2
21, 22
Clock Input (duty cycle must be 30% to 70%). Connect CLK to DVDD to activate internal clock.
CLK
25
Chip-Select Input (active-low)
CS
26
Reference-Buffer output. Bypass with a 4.7F capacitor to AGND.
REFOUT
7
Analog ground. Both pins must be connected to ground.
AGND
8, 36
Data Bits. D11 = MSB.
D11–D4
9–16
Digital Supply Voltage
DVDD
17
External reference input/internal reference output. Bypass with a 0.1F capacitor to AGND.
REFIN
6
Analog Supply Voltage
AVDD
5
PIN
Channel 1 Multiplexed Inputs (single-ended)
CH1B, CH1A
3, 4
Channel 2 Multiplexed Inputs (single-ended)
CH2B, CH2A
1, 2
FUNCTION
NAME
Address Bits
A1, A0
23, 24
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| MAX1174ACUP | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1174ACUP+ | 功能描述:模数转换器 - ADC 14-Bit 135ksps 4.2V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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